Explore challenges and solutions in AI chip development
CARVIEW |
Browse by Tags
Use these tags to explore our category pages to learn more
- 3D Image Processing
- 3DIC Design
- 5G Wireless
- 5nm and Below
- AI & Machine Learning
- AMS Simulation
- AMS Verification
- AR/VR
- About Synopsys
- Aerospace & Government
- Analog Design
- Atomic Scale Modeling
- Automotive
- CODE V
- Cloud
- Consumer
- Custom Implementation
- Customer Spotlight
- Data Center
- Debug
- Design
- Design Technology Co-Optimization
- Emulation
- Energy-Efficient SoCs
- Engineering Central
- FPGA Design
- Formal Verification
- Foundation IP
- Fusion Design Platform
- Fusion Technology
- HPC, Data Center
- Insights
- Interface IP
- Interface IP Subsystems
- Internet of Things
- LightTools
- Low Power
- LucidShape
- Manufacturing
- Mask Solutions
- Medical
- Memory
- Multi-Die
- Optical
- Photonic
- Physical Implementation
- Physical Verification
- Platform
- Processor Solutions
- Prototyping
- Quantum Computing
- RF Design
- RISC-V
- RSoft Photonic Device Tools
- RTL Synthesis
- Security IP
- Signal & Power Integrity
- Signoff
- Silicon IP
- Silicon Lifecycle Management
- Simpleware
- Simulation
- Smart Manufacturing
- SoC Verification Automation
- Static & Formal Verification
- Static Verification
- Storage
- TCAD
- Test
- Test Automation
- Verification
- Verification IP
- Virtual Prototyping
Interface Protocol Validation with Synopsys ZeBu Solutions
Mar 27, 2023 / 1 min read
Synopsys ZeBu solutions leverage proven Synopsys IP for industry leading protocols with the purpose of providing interface protocol validation using emulation.
Transactor Models
Synopsys ZeBu® server transactors are a family of over 60 protocol specific transaction-based verification solutions that allow you to quickly build a complete system-level test environment for your SoC design to be emulated in the Synopsys ZeBu system. Synopsys ZeBu transactors support common protocols and standards’ specifications such as PCI Express® (PCIe®), AMBA®, USB, MIPI® CSI-2 and MIPI DSI, I2C, I2S, Gigabit Ethernet, Ethernet AVB, CAN, HDMI, Digital Video, JTAG, and more.
These transactors include synthesizable bus functional models (BFMs) that are loaded into the Synopsys ZeBu hardware, providing maximum performance and ensuring that the transactor is always synchronized to the emulated design. Each transactor also includes C/C++ APIs to quickly create test benches and drivers to generate real-world traffic, and to link to virtual platforms. Virtual device models, application specific logs, consistency checkers, and data analysis and export functions provide the protocol specific tools to evaluate your test results quickly and efficiently.
Memory Models
Synopsys provides over 30 off-the-shelf memory models for most standard memories, such as SDRAM, DDR, LPDDR, GDDDR, HBM, plus a wide variety of Flash and other memory models. These models leverage on-board memory resources of Synopsys ZeBu, and are completely synchronized with the emulated design, eliminating any issues with timing or refresh cycles.
Speed Adaptors
Synopsys offers high fidelity system validation solutions with speed adaptors and generic ICE interface to connect the emulated design to target hardware systems, test equipment and JTAG software debuggers. Among the supported protocols are PCIe, Ethernet, USB, SATA, CXL and others.
Scalable SoC Verification
Verify the entire SoC with industry-leading VCS® simulation, Verdi® debug, VC SpyGlass™ RTL static signoff, VC Formal™ Apps, and silicon-proven Verification.