BLOG Oct 01, 2025/3 min read BLOG Shaping the Future of Semiconductor Design Through Collaboration: Synopsys Wins Multiple TSMC OIP Partner of the Year Awards By Arun Bhattacharya Tags: Multi-Die, AI & Machine Learning, RF Design, About Synopsys, Interface IP, Silicon Lifecycle Management, Signal & Power Integrity, Design, Design Technology Co-Optimization, Photonic, Silicon IP, Analog Design, 3DIC Design
BLOG Aug 14, 2025/5 min read BLOG How AI is Revolutionizing Analog and Digital Node Migrations By Sumit Vishwakarma Tags: AI & Machine Learning, Custom Implementation, Physical Verification, Design, About Synopsys, Manufacturing, AMS Simulation, Physical Implementation, Design Technology Co-Optimization, Signoff, Verification, Analog Design
BLOG Jun 25, 2025/6 min read BLOG The Integrated Design Challenge: Developing Chip, Software, and System in Unison By Synopsys Editorial Staff Tags: AI & Machine Learning, Design, About Synopsys, Design Technology Co-Optimization, Silicon IP
BLOG Feb 20, 2024/4 min read BLOG Beyond Silicon: A Look at Alternative Semiconductor Materials By Shela Aboud Tags: About Synopsys, Design Technology Co-Optimization
BLOG Jul 19, 2023/6 min read BLOG Minimize Design Risk and Achieve First-Pass Silicon Success on TSMC’s N3E Process By Josefina Hobbs, Hezi Saar Tags: About Synopsys, Design Technology Co-Optimization, Silicon IP
BLOG Jun 21, 2023/5 min read BLOG Designing Electrostatic Discharge (ESD) Protection for Monolithic SoCs and Multi-Die Systems By Dermott Lynch Tags: Multi-Die, Design, About Synopsys, Design Technology Co-Optimization
BLOG Aug 24, 2022/5 min read BLOG Why DTCO is Critical to Modern Memory Design Techniques By Anand Thiruvengadam, Ricardo Borges Tags: Custom Implementation, Design, About Synopsys, Design Technology Co-Optimization
BLOG Dec 14, 2021/4 min read BLOG What is Cryo-CMOS IP (Cryogenic semiconductor IP)? By Plamen Asenov Tags: Quantum Computing, About Synopsys, Design Technology Co-Optimization, Silicon IP
BLOG Dec 12, 2021/3 min read BLOG How DTCO Advances the Chip Design Process By Eric Chin Tags: About Synopsys, Manufacturing, Design Technology Co-Optimization
BLOG Oct 11, 2021/3 min read BLOG 2021 ERI Summit & Microsystems Technology Office Symposium By Ian Land Tags: Aerospace & Government, Silicon Lifecycle Management, Design, About Synopsys, Design Technology Co-Optimization, Silicon IP, 3DIC Design
BLOG Oct 20, 2020/4 min read BLOG Defining the AI Era with the IBM Research AI Hardware Center By Arun Venkatachar Tags: Multi-Die, AI & Machine Learning, Emulation, About Synopsys, Interface IP, Virtual Prototyping, Design, Manufacturing, Design Technology Co-Optimization, Processor Solutions, Silicon IP, Verification, 3DIC Design