Mastering AI Chip Complexity
Explore challenges and solutions in AI chip development
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Advancing AIoT Innovation and Edge AI Chip Design | Synopsys
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AI at the Edge: Synopsys Collaborates with Thai Embedded Systems Association to Advance AIoT Innovation
Aug 12, 2025 / 3 min read
Bigger isn’t always better, even when it comes to AI. While much of the industry directs its energy to building and making use of exponentially larger and more powerful AI models in giant data centers, others are addressing another engineering challenge: shrinking AI down to operate effectively at the edge.
From factory sensors to wearables, many use cases benefit from processing data on-device, in real time. Embedding lightweight AI into tiny IoT endpoints reduces latency, conserves bandwidth, and enhances data privacy and security — ultimately improving device speed and reliability.
A diverse range of AIoT applications is emerging, including:
- Industrial machinery sensors providing early fault detection through on-board inference.
- Robots and drones avoiding obstacles with greater precision by processing data locally, eliminating delays caused by sending information to and from the cloud.
- Agricultural devices making targeted watering and fertilization decisions to reduce waste.
- Wearable medical devices monitoring patient health metrics for faster, more accurate diagnostics and treatment effectiveness.
The Future of Chip Design
Discover how our full-stack, AI-driven EDA suite revolutionizes chip design with advanced optimization, data analytics, and generative AI.
Big innovations in small packages
By analyzing and interpreting data in real time, AIoT (also known as Edge AI) enables smart, autonomous decisions and adaptation to changing conditions without depending on cloud processing.
However, as much as AIoT promises to deliver heightened intelligence and interactivity, the field faces complex and unique design challenges. Breakthroughs in chip design are necessary to support AI workloads efficiently, making the most of constrained computing power while keeping energy use, heat, and size in check.
Achieving these breakthroughs will require highly specialized skills.
Developing AIoT design skills
To help drive AIoT innovation globally, Synopsys is collaborating with the Thai Embedded Systems Association (TESA) to facilitate AIoT chip prototyping and curriculum development.
As a network of developers and technology users spanning private industry, academia, and government, TESA works to spur local ecosystem growth and skill development. This new partnership will provide access to EDA tools, prototyping facilities, and structured coursework to support Thailand as it seeks to create high-value technologies and jobs.
“This partnership with Synopsys is an important milestone for Thailand’s goal to design our own chips,” says associate professor Wiroon Sriborrirux, president of TESA. “We’re working to develop a ‘nation chip’ with built-in Edge AI capabilities that will be the core technology for high-impact industries in Thailand.”
The collaboration will advance AIoT chip design in ways that no single group can achieve alone. With Synopsys Academic & Research Alliances (SARA) providing tools and universities teaching theory, TESA will provide the prototyping framework and coordinate the standardization and development of ASIC design flows. All of this is aimed at ensuring the program scales to meet real-world needs.
Ultimately, TESA intends to create a sustainable knowledge transfer model across Thailand’s ecosystem, with 50 professionals trained by the end of 2026. At the same time, it plans to expand academic partnerships and establish an expert community group to further accelerate advanced research in IC design.
Tiny and efficient AI
The Synopsys-TESA partnership is focusing first on prototyping 32-bit RISC-V chips with a tiny and efficient neural processing unit (NPU). These chips are uniquely suitable for AIoT, featuring an open and modular architecture with low power consumption and high efficiency. The 32-bit RISC-V architecture is highly adaptable for system-on-chip (SoC) implementations that integrate on-chip memory, multiple peripherals, and connectivity interfaces.
Utilizing the Synopsys University Software Program, TESA will standardize curriculum and laboratory setups across institutions, with online training expediting AIoT prototyping development. Students and professionals will get access to comprehensive analog and digital design technology and curriculum support.
Hands-on experience is key. By building a real 32-bit RISC-V chip with a small NPU, students and professionals will become familiar with RTL design, EDA tool flows, and how to optimize performance trade-offs.
The early chip prototypes will help uncover design gaps quickly and speed up toolchain maturity. Students, researchers, and engineers will gain concrete experience toward tackling bigger, more complex future generation chip designs.
Expanding AIoT expertise
RISC-V prototypes are just the beginning. TESA envisions establishing Thailand as a regional hub for AIoT chip design, evolving to complex SoCs for machine vision and 5G edge applications.
The collaboration marks a significant step toward building a sustainable and innovative future for the semiconductor workforce in Thailand. Leveraging Synopsys EDA tools, TESA’s university network, and expert communities, the partnership hopes to build a sustainable ecosystem of trained designers, IP blocks, and globally competitive startups.
“We’re building the foundation to design chips locally, reducing our need to import them while creating a new economic sector for Thailand,” says Sriborrirux. “This partnership with Synopsys will help our country become a reliable provider of secure AIoT solutions — not just for domestic needs but also to compete in global markets.”
By advancing innovations for embedding simpler forms of AI into tiny IoT endpoints, the collaboration has the potential to have a lasting impact on the industry — proof that big things can come in small packages.
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Debug,
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About Synopsys,
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Verification IP,
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