Mastering AI Chip Complexity
Explore challenges and solutions in AI chip development
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Oct 13, 2025/5 min read
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Jon Colburn – Author | Synopsys
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Jon Colburn
Jon Colburn is Chief Architect at Synopsys Inc., leading innovation in hardware analytics, silicon lifecycle management (SLM), and DFx solutions. With over 25 years in VLSI testing and design-for-test (DFT), he was previously a Distinguished Engineer at NVIDIA driving advancements in test compression, design-for-yield, and semiconductor testing. Jon holds an M.S. in Computer Engineering from UC Santa Cruz, specializing in fault modeling and ATPG development. Renowned for his expertise in scan fabric, test automation, and structural test integration, he spearheads cross-functional initiatives that unify test, telemetry, and diagnostics to deliver scalable, high-reliability solutions across complex SoC and multi-die systems.