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mapper design - Pastebin.com
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- up to 1024KB PRG ROM
- up to 1024KB PRG RAM
- PRG RAM and ROM can be mapped freely
- 32KB CHR RAM (up to 128KB)
- four screen mirroring
- scanline interrupts
- $4800 - Same as register $0e (IRQ)
- $5000 - Port address ($00-$0f)
- $5800 - Port data ($00-$ff)
- Like with MMC3 and FME-7, writing to Port Address selects a register to write to, and Port Data writes to the selected register.
- $00: CHR slot A
- $01: CHR slot B
- $02: CHR slot C
- $03: CHR slot D
- $04: CHR slot E
- $05: CHR slot F
- $06: CHR slot G
- $07: CHR slot H
- ..nn nnnn .5K bank
- ..nn nnn. 1K bank
- ..nn nn.. 2K bank
- ..nn n... 4K bank
- $08: Mirroring and CHR mode
- ..cc sfmm
- || ||++- mirroring mode
- || |+--- four-screen in last 4kb of CHR RAM, ignores mm if on
- || +---- swap $0xxx with $1xxx
- ++------ CHR mode
- Mirroring:
- 0: One-screen, lower bank of CIRAM
- 1: One-screen, upper bank of CIRAM
- 2: vertical mirroring (horizontal arrangement) from CIRAM
- 3: horizontal mirroring (vertical arrangement) from CIRAM
- When combined with sprite 0 or scanline IRQ, this allows four-screen mirroring and a status bar at the same time, as the playfield is in CHR RAM and the status bar is in CIRAM.
- CHR mode: (A through H are assigned in order)
- $0xxx | $1xxx
- 0: 1K, 1K, 1K, 1K | 1K, 1K, 1K, 1K
- 1: 2K, 1K, 1K | 2K, .5K, .5K, .5K, .5K
- 2: 2K, 2K | 1K, 1K, .5K, .5K, .5K, .5K
- 3: 4K | 1K, .5K, .5K, .5K, .5K, .5K, .5K
- PRG banks:
- rbbb bbbb
- |+++-++++- 8kb PRG bank
- +--------- 0=ROM, 1=RAM
- $09: PRG bank at $6000-$7fff
- $0a: PRG bank at $8000-$9fff
- $0b: PRG bank at $a000-$bfff
- $0c: PRG bank at $c000-$dfff
- $0d: PRG bank at $e000-$ffff
- Loss of M2 oscillation (caused by resets) causes register $0d to revert to a value of $7F, mapping the last ROM bank in the cart into $E000-$FFFF.
- $0e: Set IRQ count
- At the start of each scanline, the PPU freezes for a few cycles, and PPU A13 stays high for at least three consecutive cycles of PPU /RD. The mapper detects this and subtracts 1 from the value in $0e unless the value is $F0-$FF. While the value is 0, /IRQ is pulled low.
- Programming tip: Reading from the nametables or palette during vertical or forced blanking will cause counts unless you write $FF to port $0e.
- Some implementations may count M2 cycles (1.8 MHz) instead of PPU /RD cycles (2.7 MHz) to save a pin. Cost-reduced versions may lack IRQ logic entirely.
- $0f: Unused
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