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module viterbi_tx_rx_tb(); reg clk; reg rst; reg encoder_i; reg - Pastebin.com
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- module viterbi_tx_rx_tb();
- reg clk;
- reg rst;
- reg encoder_i;
- reg enable_encoder_i;
- wire decoder_o;
- wire [1:0] encoder_o;
- reg [1:0] corrupted_encoder_o; // To hold the corrupted encoded output
- reg [1:0] encoder_o_reg;
- reg enable_decoder_in;
- integer error_counter = 0; // To count the number of errors introduced
- integer corrected_counter = 0; // To count the number of errors corrected
- // Instantiate the DUT (Device Under Test)
- viterbi_tx_rx vtr(
- .clk(clk),
- .rst(rst),
- .encoder_i(encoder_i),
- .enable_encoder_i(enable_encoder_i),
- .decoder_o(decoder_o)
- );
- // Generate a clock signal
- always
- #50 clk = ~clk;
- // Testbench stimulus
- initial begin
- clk = 1'b1;
- rst = 1'b0;
- encoder_i = 1'b0;
- enable_encoder_i = 1'b0;
- corrupted_encoder_o = 2'b00; // Initialize the corrupted encoded output
- // Reset the system
- #1000 rst = 1'b1;
- enable_encoder_i = 1'b1;
- // Input sequence for the encoder
- #100 encoder_i = 1'b1;
- #100 encoder_i = 1'b0;
- #100 encoder_i = 1'b1;
- #100 encoder_i = 1'b1;
- #100 encoder_i = 1'b0;
- #100 encoder_i = 1'b1;
- // Stop the simulation after enough time
- #1000000 $finish;
- end
- // Simulate errors in the encoded output
- always @(posedge clk) begin
- if (rst && enable_encoder_i) begin
- // Capture the encoder output
- encoder_o_reg <= vtr.encoder_o;
- // Introduce an error in the encoder output every few cycles
- if (error_counter % 10 == 0) begin
- // Flip one bit to introduce an error
- corrupted_encoder_o = {~encoder_o_reg[1], encoder_o_reg[0]};
- error_counter = error_counter + 1;
- end else begin
- corrupted_encoder_o = encoder_o_reg; // No error
- end
- // Enable the decoder after capturing the encoded data
- enable_decoder_in <= vtr.valid_encoder_o;
- end
- end
- // Monitor the decoder output and compare it with the original input
- always @(posedge clk) begin
- if (rst && enable_decoder_in) begin
- // Check if the decoder output matches the original input
- if (decoder_o != encoder_i) begin
- corrected_counter = corrected_counter + 1;
- end
- end
- end
- // Display the number of errors introduced and corrected
- initial begin
- $monitor("Time: %0t | Encoder Input: %b | Corrupted Encoder Output: %b | Decoder Output: %b | Errors Introduced: %d | Errors Corrected: %d",
- $time, encoder_i, corrupted_encoder_o, decoder_o, error_counter, corrected_counter);
- end
- endmodule
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