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Allow (System)Verilog testbenches with Verilator
enhancementNew feature or requestNew feature or requestStatus: Open.#3632 In siliconcompiler/siliconcompiler;Add tools for tweaking/patching inputs before import
enhancementNew feature or requestNew feature or requestStatus: Open.#3598 In siliconcompiler/siliconcompiler;Chip.summary output file
enhancementNew feature or requestNew feature or requestStatus: Open.#3535 In siliconcompiler/siliconcompiler;- Status: Open.#3506 In siliconcompiler/siliconcompiler;
- Status: Open.#3467 In siliconcompiler/siliconcompiler;
- Status: Open.#3377 In siliconcompiler/siliconcompiler;
Add support for 3D placement in pin constraints
enhancementNew feature or requestNew feature or requestStatus: Open.#3241 In siliconcompiler/siliconcompiler;- Status: Open.#3239 In siliconcompiler/siliconcompiler;
Analog Design Flows
enhancementNew feature or requestNew feature or requestStatus: Open.#3088 In siliconcompiler/siliconcompiler;record timing/power metrics on a per scenario basis
enhancementNew feature or requestNew feature or requestStatus: Open.#3020 In siliconcompiler/siliconcompiler;sc-install local installation KeyError
bugSomething isn't workingSomething isn't workingStatus: Open.#2881 In siliconcompiler/siliconcompiler;Limit schema in task nodes
enhancementNew feature or requestNew feature or requestStatus: Open.#2784 In siliconcompiler/siliconcompiler;
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