[Intel GPU] format XPU oneDNN integration codes #139721

ZhiweiYan-96 · 2024-11-05T05:49:21Z

Motivation

This PR add XPU oneDNN integration codes into lintrunner config .lintrunner.toml, which would format cpp source and cpp headers codes at aten/src/ATen/native/mkldnn/xpu/ and aten/src/ATen/native/mkldnn/xpu/detail/

Stack from ghstack (oldest at bottom):

cc @jgong5 @mingfeima @XiaobingSuper @sanchitintel @ashokei @jingxu10 @voznesenskym @penguinwu @EikanWang @Guobing-Chen @zhuhaozhe @blzheng @wenzhe-nrv @jiayisunx @ipiszy @yf225 @chenyang78 @kadeng @muchulee8 @ColinPeppler @amjames @desertfire @chauhang @aakhundov

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pytorch-bot · 2024-11-05T05:49:26Z

🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/139721

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cyyever · 2024-11-05T06:38:09Z

Lots of formatting are required.

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guangyey · 2024-11-05T07:15:25Z

Lots of formatting are required.

Thanks, I will re-request your review when this PR is done.

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EikanWang · 2024-11-06T01:09:49Z

Pls. ensure the ci signal is green

ZhiweiYan-96 · 2024-11-06T03:10:46Z

@etaf is handling this CI issue. I would rebase the PR once the issue fixed.

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pytorchmergebot · 2024-11-10T06:52:10Z

@pytorchbot started a rebase job onto refs/remotes/origin/viable/strict. Check the current status here

pytorchmergebot · 2024-11-10T06:52:15Z

Rebase failed due to Command git -C /home/runner/work/pytorch/pytorch rebase refs/remotes/origin/viable/strict gh/ZhiweiYan-96/36/orig returned non-zero exit code 1

Rebasing (1/1)
Auto-merging aten/src/ATen/native/mkldnn/xpu/Blas.cpp
CONFLICT (content): Merge conflict in aten/src/ATen/native/mkldnn/xpu/Blas.cpp
error: could not apply a6ec6f32a3... [Intel GPU] format XPU oneDNN integration codes
hint: Resolve all conflicts manually, mark them as resolved with
hint: "git add/rm <conflicted_files>", then run "git rebase --continue".
hint: You can instead skip this commit: run "git rebase --skip".
hint: To abort and get back to the state before "git rebase", run "git rebase --abort".
hint: Disable this message with "git config advice.mergeConflict false"
Could not apply a6ec6f32a3... [Intel GPU] format XPU oneDNN integration codes

Raised by https://github.com/pytorch/pytorch/actions/runs/11763022477

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ZhiweiYan-96 · 2024-11-12T01:44:41Z

@pytorchbot merge

pytorchmergebot · 2024-11-12T01:46:28Z

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# Motivation This PR is a precursor to #133080. The PR extracts common logics in convolution and quantized convolution into `Utils.cpp`. With such modification, these two operators could share codes like input format querying, op layout querying. Pull Request resolved: #139580 Approved by: https://github.com/EikanWang, https://github.com/guangyey, https://github.com/malfet ghstack dependencies: #139721

# Motivation This PR add XPU oneDNN integration codes into lintrunner config `.lintrunner.toml`, which would format cpp source and cpp headers codes at `aten/src/ATen/native/mkldnn/xpu/` and `aten/src/ATen/native/mkldnn/xpu/detail/` Pull Request resolved: pytorch#139721 Approved by: https://github.com/guangyey, https://github.com/cyyever, https://github.com/EikanWang, https://github.com/Skylion007, https://github.com/malfet

# Motivation This PR is a precursor to pytorch#133080. The PR extracts common logics in convolution and quantized convolution into `Utils.cpp`. With such modification, these two operators could share codes like input format querying, op layout querying. Pull Request resolved: pytorch#139580 Approved by: https://github.com/EikanWang, https://github.com/guangyey, https://github.com/malfet ghstack dependencies: pytorch#139721

Update

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This was referenced Nov 5, 2024

[Intel GPU] Extract common utils for conv&qconv #139580

Closed

[Intel GPU] qconv at XPU backend #133080

Closed

[Intel GPU] XPUInductorQuantizer for XPU int8 recipe customization #139578

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pytorch-bot bot added the topic: not user facing topic category label Nov 5, 2024

ZhiweiYan-96 marked this pull request as draft November 5, 2024 05:50

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guangyey approved these changes Nov 5, 2024

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guangyey requested a review from cyyever November 5, 2024 06:01

pytorchbot added the open source label Nov 5, 2024

guangyey added the topic: improvements topic category label Nov 5, 2024

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pytorch-bot bot added the module: cpu CPU specific problem (e.g., perf, algorithm) label Nov 5, 2024

ZhiweiYan-96 added ciflow/xpu Run XPU CI tasks ciflow/trunk Trigger trunk jobs on your pull request labels Nov 5, 2024

ZhiweiYan-96 requested a review from EikanWang November 5, 2024 07:19

cyyever approved these changes Nov 5, 2024

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EikanWang approved these changes Nov 5, 2024

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EikanWang marked this pull request as ready for review November 5, 2024 12:19

EikanWang requested review from malfet and atalman November 5, 2024 12:21

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Skylion007 approved these changes Nov 5, 2024

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ZhiweiYan-96 added 5 commits November 10, 2024 09:02

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pytorch-bot bot added the module: inductor label Nov 11, 2024

ZhiweiYan-96 added 2 commits November 11, 2024 06:46

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pytorchmergebot closed this in e21ee63 Nov 12, 2024

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ZhiweiYan-96 mentioned this pull request Nov 19, 2024

addmm will throw unknown type name 'PO_1_BIN_ARG_DATA_T' when runing UT intel/torch-xpu-ops#891

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[Intel GPU] format XPU oneDNN integration codes #139721

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🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/139721

✅ No Failures

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