This release introduces AVX10.2 support, extended standard library coverage for small integer types, full support for element-wise functions on short vectors in the standard library, and numerous bug fixes. It is based on a patched LLVM 20.1.4.

New targets

New targets have been added for platforms supporting Intel® Advanced Vector Extensions 10.2: avx10.2-x4, avx10.2-x8, avx10.2-x16, avx10.2-x32, and avx10.2-x64.

Standard library

• Cross-lane operations - broadcast, rotate, shift, and shuffle - are now supported for unsigned types.
• Reduction functions now support signed and unsigned int8 and int16 types.
• Support for packed_load and packed_store has been extended to include: int8, int16 (signed and unsigned), float16, float, and double.
• The cube root function cbrt has been added to the standard library for float and double types.
• Dot product functionality has been enhanced with mixed signedness support for 16-bit integers. The following input combinations are now supported: u16 x u16 (unsigned x unsigned), i16 x i16 (signed x signed), u16 x i16 (mixed signedness). For consistency with other naming conventions, the function dot2add_i16_packed has been renamed to dot2add_i16i16_packed.
• The support for short vector types has been added for the following element wise functions: min, max, abs, round, floor, ceil, trunc, rcp, rcp_fast, sqrt, rsqrt, sin, asin, cos, acos, tan, atan, exp, log, atan2, pow, and cbrt.

Language changes

• The aligned(N) attribute is now available to specify the alignment of variables and struct types.
• A bug was fixed where unsigned array indices or pointer arithmetic with unsigned offsets could result in overflow due to sign extension when promoting to pointer size. This issue is now resolved, and the compiler correctly handles unsigned integer indexing and pointer arithmetic.

Compiler Switches Behavior

• The -dD and -dM flags are now supported, aiding in debugging the preprocessor and inspecting defined macros.

Template support bug fixes

• Fixed instantiation of template functions when assigned to function pointers.
• Improved implicit template argument deduction.
• Fixed a crash occurring when a nested template function did not use a templated argument.

Performance improvements

• Improved the performance of masked loads and stores for AVX-512 x32 and x64 targets by an order of magnitude (approximately ~10x on microbenchmarks).
• packed_store_active2 on AVX2 has been improved: ~65% speedup for int32, ~45% speedup for int64

Other bug fixes

• Fixed a crash during integer division by ensuring it occurs only on active lanes, improving stability and performance.
• Resolved crashes related to:
  • Incomplete struct types
  • Use of enum fields in structs
  • Pointer declarations to function types
  • Unsupported binary operations on pointer types
  • Casting to unsized arrays in malformed code
  • Accessing array elements through pointers
  • Structure member access within pointer arithmetic
• Improved compiler warnings for incomplete types.
• Corrected address calculations involving unsigned indices in array accesses and pointer arithmetic.

Ecosystem improvements

• ISPC is now supported by GitHub's Linguist, enabling proper syntax highlighting for .ispc files on GitHub.
• ISPC syntax support has been added to the following editors, thanks to community contributions:
  • CudaText - Alexey-T/CudaText#5944
  • ECoder - SpartanJ/ecode#436
• If you are integrating ISPC with Python, we recommend using nanobind. Examples are available, and we plan to generate nanobind-compatible headers in a future release.

Recommended versions of Runtime Dependencies when targeting GPU

Linux:

• Intel(R) Graphics Compute Runtime
  https://github.com/intel/compute-runtime/releases/tag/25.13.33276.16
• Level Zero Loader
  https://github.com/oneapi-src/level-zero/releases/tag/v1.20.2
• Threading Building Blocks (TBB)

Alternatively, you can use a validated gfx driver stack supporting Intel® Arc™
available at https://dgpu-docs.intel.com/driver/installation.html

Windows:

• Intel(R) Graphics Windows(R) DCH Drivers 32.0.101.6083
  https://www.intel.com/content/www/us/en/download/785597/intel-arc-iris-xe-graphics-windows.html
• Level Zero Loader
  https://github.com/oneapi-src/level-zero/releases/tag/v1.20.2
• OpenCL™ Offline Compiler (OCLOC)
  https://www.intel.com/content/www/us/en/developer/articles/tool/oneapi-standalone-components.html
  (this is needed for AoT compilation on Windows only)
• Supported GPU platforms: Intel(R) Arc Graphics, 11th-13th Gen Intel(R) Core
  processor graphics

Components revisions used in GPU-enabled build:

• KhronosGroup/SPIRV-LLVM-Translator@6dd8f2a1
• intel/vc-intrinsics@b980474c
• oneapi-src/level-zero@d7a44e0 (v1.20.2)
• llvm/llvm-project@ec28b8f (llvmorg-20.1.4) + patches from llvm_patches folder

ISPC release featuring improved ARM support, new "generic" targets that simplify ISPC's internal design and streamline the addition of new targets, improved code generation across x86 and ARM, and multiple stability fixes. This release is based on a patched LLVM 18.1.8.

ARM Support Changes:

• The --arch=arm flag, which previously mapped to ARMv7 (32-bit), now maps to ARMv8 (32-bit). There are no changes to
  --arch=aarch64, which continues to map to ARMv8 (64-bit).
• The CPU definitions for the ARMv7 architecture have been removed: cortex-a9 and cortex-a15.
• New CPU definitions have been introduced, including cortex-a55, cortex-a78, cortex-a510, and cortex-a520, along with support for new Apple devices.
• New double-pumped targets have been introduced: neon-i16x16 and neon-i8x32.
• Dot product operations are now supported using native ARM instructions (sdot/udot).
• Performance on ARMv8 has been improved by an average on 13%.

Generic Targets:

In this release, generic targets were introduced in ISPC. Their main goal is to simplify ISPC target management and serve as the foundation for hardware-specific targets, requiring only selective tuning when performance expectations are not met.

ARM targets have been refactored to use generic targets as a baseline, resulting in cleaner code and improved performance. This change also makes it easier to add support for new architectures, such as RISC-V or any other LLVM-supported target.

Generic targets can also be used as standalone targets in cases where no native target exists with the required width for a particular CPU (e.g., a 32-wide target for SSE4). This can be done by specifying the following options in ISPC:

--target=generic-i1x32 --cpu=penryn

A complete list of all generic targets and the architectures they support can be found in the output of:

ispc --support-matrix

Code Generation:

• The -O1 optimization pipeline has been further optimized for size: loop unrolling and function inlining have been adjusted accordingly.
• Improved generated code for the count_leading_zeros and count_trailing_zeros functions by producing native instructions ( e.g.
  vplzcntq).
• Improved generated code for masked load/stores for int8/int16 types on AVX512 by generating native instructions (vmovdqu8, vmovdqu16).
• Improved code generation when returning structs from functions by eliminating unnecessary mov instructions.

Language Changes:

• Enhanced support for LLVM intrinsics when the --enable-llvm-intrinsics flag is used, including support for intrinsics with no arguments and overloaded intrinsics.
• Added user-visible macro definitions for the LLVM version that ISPC is based on.
• The __attribute__((deprecated)) attribute can now be applied to functions, generating a warning when the function is called.

Deprecated Targets:

• The KNL (avx512knl-x16) target has been removed.

Compiler Switches Behavior:

• The --darwin-version-min option has been added to specify the minimum deployment target version for macOS and iOS applications. This addresses a new linker behavior introduced in Xcode 15.0, which issues a warning when no version is provided.
• The --nocpp command-line flag is now deprecated and will be removed in a future release.

Dispatch Behavior:

• The behavior of user programs when no supported ISA is detected in the auto-dispatch code has changed. Instead of raising the SIGABRT signal, the system will now raise SIGILL. This affects users who rely on SIGABRT in their signal handlers for error handling or recovery. Such users must update their code to handle SIGILL instead. This change improves predictability and removes the dispatcher's reliance on the C standard library.

Bug Fixes:

• Fixed a crash for functions returning pointers.
• Fixed incorrect values for some predefined macros.
• Fixed a crash when using sizeof as a global variable initializer.
• Fixed function template overload resolution issues.
• Fixed incorrect behavior in short vector casts inside templates.
• Fixed incorrect zero handling in the ldexp standard library function.

Recommended versions of Runtime Dependencies when targeting GPU:

Linux:

• Intel(R) Graphics Compute Runtime https://github.com/intel/compute-runtime/releases/tag/24.35.30872.22
• Level Zero Loader https://github.com/oneapi-src/level-zero/releases/tag/v1.17.28
• Threading Building Blocks (TBB)

Alternatively, you can use a validated gfx driver stack supporting Intel® Arc™ available at https://dgpu-docs.intel.com/driver/installation.html

Windows:

• Intel(R) Graphics Windows(R) DCH Drivers 32.0.101.6083
  https://www.intel.com/content/www/us/en/download/785597/intel-arc-iris-xe-graphics-windows.html
• Level Zero Loader
  https://github.com/oneapi-src/level-zero/releases/tag/v1.17.28
• OpenCL™ Offline Compiler (OCLOC)
  https://www.intel.com/content/www/us/en/developer/articles/tool/oneapi-standalone-components.html
  (this is needed for AoT compilation on Windows only)
• Supported GPU platforms: Intel(R) Arc Graphics, 11th-13th Gen Intel(R) Core processor graphics

Components revisions used in GPU-enabled build:

• KhronosGroup/SPIRV-LLVM-Translator@43fb73fe
• intel/vc-intrinsics@4f5bc1bb
• oneapi-src/level-zero@c1f6e28 (v1.17.28)
• https://github.com/llvm/llvm-project/commit/3b5b5c1(llvmorg-18.1.8) + patches from llvm_patches folder

Automatically updated trunk artifacts

A minor ISPC update with a fix for --vectorcall calling convention mode on Windows.

A minor ISPC update with several bug fixes:

• Fixed broken --vectorcall calling convention mode on Windows.
• Fix build error on FreeBSD.
• Removed in-memory ISPC headers (/core.isph, /stdlib.isph) from dependencies for -M switch for Windows binaries.
• Fixed linker errors on Windows for multi-target compilation.

A minor ISPC update with several bug fixes:

• Removed warning for wrong suffix when the file with dependencies is generated with -M -MF switches (#3062).
• Removed in-memory ISPC headers (/core.isph, /stdlib.isph) from dependencies for -M switch.

ISPC release featuring new attribute syntax support, extended template handling for short vectors and arrays, added support for new Intel GPUs and CPUs, and significant code generation and compile time enhancements. This release is based on patched LLVM 18.1.8, with the minimum required glibc version for Linux binaries raised to 2.27.

Language changes:

• Added support for __attribute__ syntax in variable and function declarations. The following attributes are now supported: noescape,
  address_space(N), external_only, and unmangled.
• Added template support for short vectors and extended it for array declarations, allowing the use of type and non-type parameters to specify their types and dimensions.
• Added error messages for variable declarations with incompatible type specifiers.
• Supported typedef with same name as struct tag.

Code generation:

• Improved generated code for cases when foreach loop iteration domain is equal 3.
• Reduced the number of copies in dispatcher logic for cases where a user application consists of several multi-target modules.
• Improved the generated code for foreach loop counters by propagating LLVM IR flags (e.g., nsw, nuw) in ISPC optimization passes.
• Improved shuffles generation for some AVX2 and AVX512 targets, resulting in up to 80% faster code.
• Produced IEEE 754 compliant instructions (fminnm/vminnm) on ARM for min/max operations.

Compile time:

• Updated standard library (stdlib) processing: ISPC no longer parses the stdlib source code for each compiled source file. Instead, the stdlib is precompiled into an LLVM IR module during the ISPC build process and is loaded and linked on-demand when needed by user code. This change significantly reduces compilation time, with improvements ranging from 5% to 60%, depending on the size of the user's code (the smaller the code, the greater the improvement). More details about this change is here.

New targets:

• Added xe2hpg-x16 and xe2hpg-x32 targets for Xe2 Battlemage Intel(R) GPUs.
• Added xe2lpg-x16 and xe2lpg-x32 targets for Xe2 Lunar Lake Intel(R) GPUs.
• Added CPU definitions for ArrowLake, LunarLake and GraniteRapids: arrowlake, lunarlake and graniterapids respectively.

Deprecated targets:

• avx512knl-x16, gen9-x8 and gen9-x16 targets are deprecated and will be removed in future releases.
• Adjusted device names for xelpg-x8 and xelpg-x16 to mtl-u and mtl-h.

Standard library:

• Fixed the implementation of exp for -Inf, NaN, and large numbers, which previously resulted in highly inaccurate results.
• Added a function for the floating-point remainder of division (fmod) for floating-point types.
• Added support for float/double atomics (add, sub, min, max).

Compiler switches behavior:

• Supported the -ffunction-sections command line flag to generate each function in a separate section.

Infrastructure/build changes:

• ISPC can now be built in two modes: slim and composite. The default mode is composite, which corresponds to the current distribution practice of packaging ISPC as a single binary. The slim mode can be enabled by setting ISPC_SLIM_BINARY=ON. In this mode, the stdlib and binutils libraries are excluded from the binary, resulting in a smaller binary footprint. Instead, these libraries are placed alongside the ISPC binary. This mode simplifies the ISPC build process, making it more suitable for development purposes.
• Removed build dependency from ncurses/terminfo.
• Added dead code stripping for macOS binaries during linking to reduce the final binary size.
• Fixed build logic for determining the list of system libraries required by LLVM.
• Fixed issue with installation of test files for ISPC Runtime.
• Added numerous new GitHub Actions workflows with security testing. ISPC now follows OpenSSF best practices for development.

Bug fixes:

• Fixed crashes found by fuzzing.
• Fixed C/C++ header generation for typedefs with anonymous structs.
• Fixed the loss of the uniform qualifier in nested templates.
• Added dump of module verifier's output when it reports an error.

Recommended versions of Runtime Dependencies when targeting GPU:

Linux:

• Intel(R) Graphics Compute Runtime https://github.com/intel/compute-runtime/releases/tag/24.35.30872.22
• Level Zero Loader https://github.com/oneapi-src/level-zero/releases/tag/v1.17.28
• Threading Building Blocks (TBB)

Alternatively, you can use a validated gfx driver stack supporting Intel® Arc™ available at https://dgpu-docs.intel.com/driver/installation.html

Windows:

• Intel(R) Graphics Windows(R) DCH Drivers 32.0.101.6083 https://www.intel.com/content/www/us/en/download/785597/intel-arc-iris-xe-graphics-windows.html
• Level Zero Loader https://github.com/oneapi-src/level-zero/releases/tag/v1.17.28
• OpenCL™ Offline Compiler (OCLOC) https://www.intel.com/content/www/us/en/developer/articles/tool/oneapi-standalone-components.html (this is needed for AoT compilation on Windows only)
• Supported GPU platforms: Intel(R) Arc Graphics, 11th-13th Gen Intel(R) Core processor graphics

Components revisions used in GPU-enabled build:

• KhronosGroup/SPIRV-LLVM-Translator@43fb73fe
• intel/vc-intrinsics@4f5bc1bb
• oneapi-src/level-zero@c1f6e28 (v1.17.28)
• https://github.com/llvm/llvm-project/commit/3b5b5c1(llvmorg-18.1.8) + patches from llvm_patches folder

ISPC release with dot product functions, non-type template parameters, and generated code improvements. This release is based on patched LLVM 17.0.6.

Language changes:

• Added support for non-type template parameters. Uniform integers and enums can be used now as template parameters.
• Added dot product functions for unsigned and signed int8 and int16 types. They leverage AVX-VNNI and AVX512-VNNI instructions if supported by targets (docs).
• Added macro definitions for numeric limits.

New targets:

1. avx2vnni-i32x4, avx2vnni-i32x8, avx2vnni-i32x16 with AVX-VNNI instruction support,
2. avx512icl-x4, avx512icl-x8, avx512icl-x16, avx512icl-x32 and avx512icl-x64 with AVX512-VNNI instruction support.

Code generation:

• Fixed generation of code for GPU when unnecessary vectorized instruction are used during address arithmetic, e.g., for accessing fields of varying structures (#2846).
• Improved generated code for cases when foreach loop iteration domain is less than the target width (#2836 ).

Compiler switches behavior:

• --pic command line flag now corresponds to the -fpic flag of Clang and GCC, whereas the newly introduced --PIC corresponds to -fPIC.

Bug fixes:

• The implementation of round standard library function was aligned across all targets. It may potentially affect the results of the code that uses this function for the following targets: avx2-i16x16, avx2-i8x32 and all avx512 targets (#2793).
• Fixed cases when unwind info were not generated for functions. This impacted debugging and profiling on Windows (#2842).
• Fixed broken targets sse4-i8xN and avx2-i8xN (#2800).

Recommended versions of Runtime Dependencies when targeting GPU:

Linux:

• Intel(R) Graphics Compute Runtime https://github.com/intel/compute-runtime/releases/tag/24.05.28454.6
• Level Zero Loader https://github.com/oneapi-src/level-zero/releases/tag/v1.16.9
• Threading Building Blocks (TBB)

Alternatively, you can use a validated gfx driver stack supporting Intel® Arc™ available at https://dgpu-docs.intel.com/driver/installation.html

Windows:

• Intel(R) Graphics Windows(R) DCH Drivers 31.0.101.5518 https://www.intel.com/content/www/us/en/download/785597/intel-arc-iris-xe-graphics-windows.html
• Level Zero Loader https://github.com/oneapi-src/level-zero/releases/tag/v1.16.9
• OpenCL™ Offline Compiler (OCLOC) https://www.intel.com/content/www/us/en/developer/articles/tool/oneapi-standalone-components.html (this is needed for AoT compilation on Windows only)
• Supported GPU platforms: Intel(R) Arc Graphics, 11th-13th Gen Intel(R) Core processor graphics

Components revisions used in GPU-enabled build:

• KhronosGroup/SPIRV-LLVM-Translator@89ab5df3
• intel/vc-intrinsics@f9c34404
• oneapi-src/level-zero@61c97c87 (v1.16.9)
• https://github.com/llvm/llvm-project/commit/6009708(llvmorg-17.0.6) + patches from llvm_patches folder

ISPC release with bug fixes and a few language improvements. The release is based on patched LLVM 16.0.6.

Language changes:

• Improved const variables initialization:

  1. Variables with const qualifiers can be initialized using the values of previously initialized const variables including arithmetic operations above them.
  2. Enum values can be used as constants.

• One can use the result of selection operator as lvalue now.

Compiler switches behavior:

• --dump-file=<dir> forces now to dump the whole IR modules after each pass.

ISPC Runtime improvements:

• Added ISPCRT_GPU_DRIVER environment variable that allows to choose the specific driver. If more than one supported GPU is present in the system, they may be managed by several GPU drivers. The user can select the GPU driver using this variable.

Infrastructure/build changes:

• Removed the build dependency from llvm-dis.
• Lock the time zone to UTS to fix build reproducibility.

Bug fixes:

• Fixed ABI compatibility of bool types returned to C/C++ code.
• Fixed build error when bison emulates POSIX Yacc.
• Fixed target definition for neon-i16x8, sse2-i32x8 and ps5.
• Fixed ICE when generating unwind info for aarch64 code on Windows.

Recommended versions of Runtime Dependencies when targeting GPU:

Linux:

• Intel(R) Graphics Compute Runtime https://github.com/intel/compute-runtime/releases/tag/23.48.27912.11
• Level Zero Loader https://github.com/oneapi-src/level-zero/releases/tag/v1.15.1
• Threading Building Blocks (TBB)

Alternatively, you can use a validated gfx driver stack supporting Intel® Arc™ available at https://dgpu-docs.intel.com/driver/installation.html

Windows:

• Intel(R) Graphics Windows(R) DCH Drivers 31.0.101.5194_101.5252
  https://www.intel.com/content/www/us/en/download/785597/intel-arc-iris-xe-graphics-windows.html
• Level Zero Loader
  https://github.com/oneapi-src/level-zero/releases/tag/v1.15.1
• OpenCL™ Offline Compiler (OCLOC)
  https://www.intel.com/content/www/us/en/developer/articles/tool/oneapi-standalone-components.html
  (this is needed for AoT compilation on Windows only)
• Supported GPU platforms: Intel(R) Arc Graphics, 11th-13th Gen Intel(R) Core processor graphics

Components revisions used in GPU-enabled build:

• KhronosGroup/SPIRV-LLVM-Translator@d1c69c33
• intel/vc-intrinsics@b16218b8
• oneapi-src/level-zero@ea5be99 (v1.15.1)
• https://github.com/llvm/llvm-project/commit/7cbf1a25(llvmorg-16.0.6) + patches from llvm_patches folder

ISPC release with template operators support; improved debugging experience of ISPC code on Windows; multiple stability and performance fixes and more. The release is based on patched LLVM 16.0.6.

ISPC distribution changes:

• ISPC binaries were compiled with LTO by Clang/LLVM toolchain on all supported platforms and architectures using superbuild. ISPC binaries got faster a few percent in average.
• Examples were excluded from ISPC archives. They are placed alongside as separate archives ispc-examples-v1.22.0.zip and ispc-examples-v1.22.0.tar.gz.

Language changes:

• Added support for template operators.
• Revised the usage of function specifiers with templates. For more details please refer to Function Templates section of documentation.

Infrastructure changes:

• Release built with LTO (except aarch64 Linux).
• Supported building ISPC with LLVM 17 although GPU support wasn't tested.

New compiler switches:

• --dwarf-version switch accepts DWARF 5 version.
• --dwarf-version switch forces DWARF format debug info generation on Windows. It allows to debug ISPC code linked with MinGW generated code (#2129).

Bug fixes:

• Fixed performance regression on GPU caused by missed memory effects for genx intrinsics declarations.
• Fixed performance regression caused by change in the loop unswitch LLVM pass.
• Fixed C compatibility of ISPC generated headers (#2650, #2652).
• Added unwind table to ISPC generated functions for Windows targets. It fixed issues with incorrect backtrace during debugging and profiling (#2345, #1318).
• Fixed emitted code for negate of short float vectors (#2628).
• Fixed several issues that were related to the usage of bool in different cases (#2272, #2333, #2367, #2689).

Recommended versions of Runtime Dependencies when targeting GPU:
Linux:

• Intel(R) Graphics Compute Runtime https://github.com/intel/compute-runtime/releases/tag/23.30.26918.9
• Level Zero Loader https://github.com/oneapi-src/level-zero/releases/tag/v1.14.0
• Threading Building Blocks (TBB)

Alternatively, you can use a validated gfx driver stack supporting Intel® Arc™ available at https://dgpu-docs.intel.com/driver/installation.html

Windows:

• Intel(R) Graphics Windows(R) DCH Drivers 31.0.101.4826 https://www.intel.com/content/www/us/en/download/785597/788440/intel-arc-iris-xe-graphics-windows.html
• Level Zero Loader https://github.com/oneapi-src/level-zero/releases/tag/v1.14.0
• OpenCL™ Offline Compiler (OCLOC) https://www.intel.com/content/www/us/en/developer/articles/tool/oneapi-standalone-components.html (this is needed for AoT compilation on Windows only)
• Supported GPU platforms: Intel(R) Arc Graphics, 11th-13th Gen Intel(R) Core processor graphics

Components revisions used in GPU-enabled build:

• KhronosGroup/SPIRV-LLVM-Translator@8ac46249
• intel/vc-intrinsics@77f069b7
• oneapi-src/level-zero@37363a45 (v1.14.0)
• llvm/llvm-project@7cbf1a25 (llvmorg-16.0.6) + patches from llvm_patches folder