A hardware component library developed with ROHD. This library aims to collect a set of reusable, configurable components that can be leveraged in other designs. These components are also intended as good examples of ROHD hardware implementations.

Check out the generator web app, which lets you explore some of the available components, configure them, and generate SystemVerilog.

This project is always improving and growing! In a given category, initial components are primarily focused on correctness with room for optimization from there. Please feel free to contribute or provide feedback. Check out CONTRIBUTING for details on how to contribute.

This project is not intended to be the only place for reusable hardware components developed in ROHD. It's not even intended to be the only library. Contributions are welcomed to this library, but developers are also welcome to build independent packages or libraries, even if they may overlap.

• All hardware components should be Modules so that they are convertible to SystemVerilog
• Components should be general and easily reusable
• Components should be as configurable as may be useful
• Components must be extensively tested
• Components must have excellent documentation and examples
• The first component in a category should be the simplest
• Focus on breadth of component types before depth in one type
• Add extensions to other classes to make component usage easier, when appropriate

See the component list for documentation on components and plans for future component development.

Some examples of component categories include:

• Encoders & Decoders
• Arbiters
• FIFOs & Queues
• Find
• Count
• Sort
• Arithmetic
• Rotate
• Counters
• Pseudorandom
• Error checking & correction
• Data flow
• Memory
• Standard interfaces
• Models

Copyright (C) 2023-2025 Intel Corporation
SPDX-License-Identifier: BSD-3-Clause