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【pir&npu】add memcpy when while arg's place is diffrent from yield op input's place by xiaoguoguo626807 · Pull Request #72176 · PaddlePaddle/Paddle · GitHub
xiaoguoguo626807
merged commit Apr 11, 2025
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【pir&npu】add memcpy when while arg's place is diffrent from yield op input's place #72176
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Merged
xiaoguoguo626807
merged 14 commits into
PaddlePaddle:develop
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xiaoguoguo626807:reshape
Apr 11, 2025
Merged
【pir&npu】add memcpy when while arg's place is diffrent from yield op input's place #72176
xiaoguoguo626807
merged 14 commits into
PaddlePaddle:develop
from
xiaoguoguo626807:reshape
Apr 11, 2025
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你的PR提交成功,感谢你对开源项目的贡献! |
changeyoung98
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LGTM
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…input's place (PaddlePaddle#72176) * modify place error * modify place error * modify RemoveRedundantMemcpyAfterShadowFeed * change input place by next op need * recover * add npu memcpy_d2h choose * add npu memcpy_d2h choose * modify reshape diffrent input of while iter * fix ci * fix ci
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PR Category
Execute Infrastructure
PR Types
Bug fixes
Description
pcard-67164
有如下 IR before lowering to kernel:
%input1 = custom_device_tensor<1xi64>
pd_op.while(%cond, %input1){
%1 = pd.op1(%arg_0) on npu
%2 = pd.memcpy_d2h(%1)
%3 = pd.op2(%2) on cpu
cf.yiled(%cond,%2)
}
在IR lowering过程中,while 的输入是npu , 但是内部循环得到的变量是cpu 时,在第二次迭代时op1 拿到的变量place 不对, 因此会给%3 做一个copy ,得到npu 的%4作为下次迭代的变量。
%input1 = custom_device_tensor<1xi64>
pd_op.while(%cond, %input1){
%1 = pd.op1(%arg_0) on npu
%2 = pd.memcpy_d2h(%1)
%3 = pd.op2(%2) on cpu
%4 = pd.memcpy_d2h(%3)
cf.yiled(%cond,%4)
}