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diff --git a/‎paddle/cinn/backends/codegen_c.cc
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+306-268Lines changed: 306 additions & 268 deletions b/‎paddle/cinn/backends/codegen_c.cc
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+306-268Lines changed: 306 additions & 268 deletions
diff --git a/‎paddle/cinn/backends/codegen_c.h
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+6-5Lines changed: 6 additions & 5 deletions b/‎paddle/cinn/backends/codegen_c.h
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+6-5Lines changed: 6 additions & 5 deletions
diff --git a/‎paddle/cinn/backends/codegen_c_x86.cc
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+39-33Lines changed: 39 additions & 33 deletions b/‎paddle/cinn/backends/codegen_c_x86.cc
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+39-33Lines changed: 39 additions & 33 deletions
diff --git a/‎paddle/cinn/backends/codegen_c_x86.h
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+14-9Lines changed: 14 additions & 9 deletions b/‎paddle/cinn/backends/codegen_c_x86.h
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+14-9Lines changed: 14 additions & 9 deletions
@@ -56,8 +56,7 @@ class CodeGenC : public ir::IrPrinter {
   void SetInlineBuiltinCodes(bool x = true) { inline_builtin_codes_ = x; }
 
  protected:
-  std::string Compile(const ir::LoweredFunc& function);
-  std::string Compile(const ir::Buffer& buffer);
+  void Compile(const ir::LoweredFunc& function);
 
   void GenerateHeaderFile(const ir::Module& module);
 
@@ -71,9 +70,11 @@ class CodeGenC : public ir::IrPrinter {
   // @}
 
   void PrintFunctionDeclaration(const ir::_LoweredFunc_* op) {
-    os() << "void " << op->name << "(";
-    os() << "void* _args, int32_t num_args";
-    os() << ")";
+    str_ += "void ";
+    str_ += op->name;
+    str_ += "(";
+    str_ += "void* _args, int32_t num_args";
+    str_ += ")";
   }
 
   void PrintShape(const std::vector<Expr>& shape,
 
@@ -37,13 +37,13 @@ void CodeGenCX86::Visit(const ir::Load *op) {
 
     int bits = op->type().bits() * op->type().lanes();
     if (SupportsAVX512() && bits == 512) {
-      os() << "cinn_avx512_load(";
+      str_ += "cinn_avx512_load(";
       PrintAbsAddr(op);
-      os() << ")";
+      str_ += ")";
     } else if (SupportsAVX256() && bits == 256) {
-      os() << "cinn_avx256_load(";
+      str_ += "cinn_avx256_load(";
       PrintAbsAddr(op);
-      os() << ")";
+      str_ += ")";
     } else {
       CodeGenC::Visit(op);
     }
@@ -57,13 +57,13 @@ void CodeGenCX86::Visit(const ir::Broadcast *op) {
   int bits = op->type().bits() * op->type().lanes();
 
   if (SupportsAVX512() && bits == 512) {
-    os() << "cinn_avx512_set1(";
+    str_ += "cinn_avx512_set1(";
     PrintCastExpr(op->value.type().ElementOf(), op->value);
-    os() << ")";
+    str_ += ")";
   } else if (SupportsAVX256() && bits == 256) {
-    os() << "cinn_avx256_set1(";
+    str_ += "cinn_avx256_set1(";
     PrintCastExpr(op->value.type().ElementOf(), op->value);
-    os() << ")";
+    str_ += ")";
   } else {
     CodeGenC::Visit(op);
   }
@@ -77,17 +77,17 @@ void CodeGenCX86::Visit(const ir::Store *op) {
 
   int bits = op->type().bits() * op->type().lanes();
   if (SupportsAVX512() && bits == 512) {
-    os() << "cinn_avx512_store(";
+    str_ += "cinn_avx512_store(";
     PrintAbsAddr(op);
-    os() << ", ";
-    Print(op->value);
-    os() << ")";
+    str_ += ", ";
+    IrPrinter::Visit(op->value);
+    str_ += ")";
   } else if (SupportsAVX256() && bits == 256) {
-    os() << "cinn_avx256_store(";
+    str_ += "cinn_avx256_store(";
     PrintAbsAddr(op);
-    os() << ", ";
-    Print(op->value);
-    os() << ")";
+    str_ += ", ";
+    IrPrinter::Visit(op->value);
+    str_ += ")";
   } else {
     CodeGenC::Visit(op);
   }
@@ -101,18 +101,18 @@ void CodeGenCX86::PrintVecInputArgument(const Expr *op) {
     Expr value = op->type().lanes() == 1 ? *op : broadcast_n->value;
 
     if (SupportsAVX512()) {
-      os() << "cinn_avx512_set1(";
-      Print(value);
-      os() << ")";
+      str_ += "cinn_avx512_set1(";
+      IrPrinter::Visit(value);
+      str_ += ")";
     } else if (SupportsAVX256()) {
-      os() << "cinn_avx256_set1(";
-      Print(value);
-      os() << ")";
+      str_ += "cinn_avx256_set1(";
+      IrPrinter::Visit(value);
+      str_ += ")";
     } else {
       CINN_NOT_IMPLEMENTED
     }
   } else {
-    Print(*op);
+    IrPrinter::Visit(*op);
   }
 }
 
@@ -123,35 +123,41 @@ void CodeGenCX86::Visit(const ir::intrinsics::BuiltinIntrin *op) {
   }
   int bits = op->type().bits() * op->type().lanes();
   if (SupportsAVX512() && bits == 512) {
-    os() << "cinn_avx512_" << op->name << "(";
+    str_ += "cinn_avx512_";
+    str_ += op->name;
+    str_ += "(";
     if (!op->args.empty()) {
       for (int i = 0; i < op->args.size() - 1; i++) {
         PrintVecInputArgument(&op->args[i]);
-        os() << ", ";
+        str_ += ", ";
       }
-      Print(op->args.back());
+      IrPrinter::Visit(op->args.back());
     }
-    os() << ")";
+    str_ += ")";
   } else if (SupportsAVX256() && bits == 256) {
-    os() << "cinn_avx256_" << op->name << "(";
+    str_ += "cinn_avx256_";
+    str_ += op->name;
+    str_ += "(";
     if (!op->args.empty()) {
       for (int i = 0; i < op->args.size() - 1; i++) {
         PrintVecInputArgument(&op->args[i]);
-        os() << ", ";
+        str_ += ", ";
       }
       PrintVecInputArgument(&op->args.back());
     }
-    os() << ")";
+    str_ += ")";
   } else if (bits == 128) {
-    os() << "cinn_avx128_" << op->name << "(";
+    str_ += "cinn_avx128_";
+    str_ += op->name;
+    str_ += "(";
     if (!op->args.empty()) {
       for (int i = 0; i < op->args.size() - 1; i++) {
         PrintVecInputArgument(&op->args[i]);
-        os() << ", ";
+        str_ += ", ";
       }
       PrintVecInputArgument(&op->args.back());
     }
-    os() << ")";
+    str_ += ")";
   } else {
     CodeGenC::Visit(op);
   }
 
@@ -91,16 +91,17 @@ class CodeGenCX86 : public CodeGenC {
 
   template <typename Op>
   void PrintAbsAddr(const Op *op) {
-    os() << op->tensor.template As<ir::_Tensor_>()->name << " + ";
+    str_ += op->tensor.template As<ir::_Tensor_>()->name;
+    str_ += " + ";
 
     auto index = op->index();
     auto *ramp_n = index.template As<ir::Ramp>();
     if (ramp_n) {
       CHECK(!ramp_n->base.template As<ir::Ramp>())
           << "base of a Ramp node should not be Ramp type";
-      Print(ramp_n->base);
+      IrPrinter::Visit(ramp_n->base);
     } else {
-      Print(op->index());
+      IrPrinter::Visit(op->index());
     }
   }
 
@@ -125,17 +126,21 @@ void CodeGenCX86::VisitBinaryOp(const Op *op,
   // TODO(Superjomn) Consider support BLAS.
   int bits = a.type().bits() * a.type().lanes();
   if (SupportsAVX512() && bits == 512) {
-    os() << "cinn_avx512_" << op_repr << "(";
+    str_ += "cinn_avx512_";
+    str_ += op_repr;
+    str_ += "(";
     PrintVecInputArgument(&a);
-    os() << ", ";
+    str_ += ", ";
     PrintVecInputArgument(&b);
-    os() << ")";
+    str_ += ")";
   } else if (SupportsAVX256() && bits == 256) {
-    os() << "cinn_avx256_" << op_repr << "(";
+    str_ += "cinn_avx256_";
+    str_ += op_repr;
+    str_ += "(";
     PrintVecInputArgument(&a);
-    os() << ", ";
+    str_ += ", ";
     PrintVecInputArgument(&b);
-    os() << ")";
+    str_ += ")";
   } else {
     CodeGenC::Visit(op);
   }