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diff --git a/‎paddle/cinn/hlir/framework/pir/op_lowering_impl.cc
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-1Lines changed: 0 additions & 1 deletion b/‎paddle/cinn/hlir/framework/pir/op_lowering_impl.cc
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-1Lines changed: 0 additions & 1 deletion
diff --git a/‎paddle/cinn/optim/optimize.cc
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+10-4Lines changed: 10 additions & 4 deletions b/‎paddle/cinn/optim/optimize.cc
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+10-4Lines changed: 10 additions & 4 deletions
@@ -37,7 +37,6 @@
 #include "paddle/cinn/operator_fusion/fusion_interface.h"
 #include "paddle/cinn/optim/check_tensor_buffer_map.h"
 #include "paddle/cinn/optim/eliminate_common_global_memory_read.h"
-#include "paddle/cinn/optim/rearrange_load_instruction.h"
 #include "paddle/cinn/optim/schedule_block_dce.h"
 #include "paddle/cinn/optim/transform_gpu_forloop.h"
 #include "paddle/common/ddim.h"
 
@@ -69,9 +69,7 @@ ir::LoweredFunc Optimize(ir::LoweredFunc fn,
   ReplaceCrossBlockReduction(copied);
   VLOG(4) << "After Optimize ReplaceCrossBlockReduction:" << copied;
 
-  cinn::common::DefaultDeviceTarget().arch.Match(
-      [&](std::variant<common::UnknownArch, common::X86Arch, common::ARMArch>) {
-      },
+  target.arch.Match(
       [&](common::NVGPUArch) {
 #ifdef CINN_WITH_CUDA
         ir::SetCudaAxisInfo(copied);
@@ -92,7 +90,8 @@ ir::LoweredFunc Optimize(ir::LoweredFunc fn,
     // CudaTransBufferWithDynamicShape(&copied);
 #endif
       },
-      [&](common::HygonDCUArchSYCL) { CINN_NOT_IMPLEMENTED });
+      [&](common::HygonDCUArchSYCL) { CINN_NOT_IMPLEMENTED },
+      [](auto) {});
 
   SimplifyBlocks(&copied->body);
   VLOG(4) << "After SimplifyBlocks:" << copied;
@@ -110,6 +109,13 @@ ir::LoweredFunc Optimize(ir::LoweredFunc fn,
   pass_manager.AddPass(CreateIfFusionPass());
   pass_manager.Run(copied);
 
+  target.arch.Match(
+      [&](common::NVGPUArch) {
+        RearrangeLoadInstruction(&copied->body);
+        VLOG(4) << "After Optimize RearrangeLoadInstruction:" << copied;
+      },
+      [](auto) {});
+
   VectorizeForTrans(&copied->body);
   VLOG(10) << "After Optimize vectorize" << copied;