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diff --git a/‎paddle/cinn/auto_schedule/search_space/auto_gen_rule/multi_level_tiling.cc
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diff --git a/‎paddle/cinn/auto_schedule/search_space/auto_gen_rule/multi_level_tiling.h
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+1-1Lines changed: 1 addition & 1 deletion b/‎paddle/cinn/auto_schedule/search_space/auto_gen_rule/multi_level_tiling.h
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diff --git a/‎paddle/cinn/auto_schedule/task/tune_task_test.cc
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+3-3Lines changed: 3 additions & 3 deletions b/‎paddle/cinn/auto_schedule/task/tune_task_test.cc
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diff --git a/‎paddle/cinn/backends/codegen_c_test.cc
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+1-1Lines changed: 1 addition & 1 deletion b/‎paddle/cinn/backends/codegen_c_test.cc
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diff --git a/‎paddle/cinn/backends/codegen_c_x86_test.cc
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+1-1Lines changed: 1 addition & 1 deletion b/‎paddle/cinn/backends/codegen_c_x86_test.cc
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diff --git a/‎paddle/cinn/backends/compiler.cc
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+27-26Lines changed: 27 additions & 26 deletions b/‎paddle/cinn/backends/compiler.cc
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+27-26Lines changed: 27 additions & 26 deletions
diff --git a/‎paddle/cinn/backends/extern_func_jit_register.h
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+6-9Lines changed: 6 additions & 9 deletions b/‎paddle/cinn/backends/extern_func_jit_register.h
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diff --git a/‎paddle/cinn/backends/llvm/codegen_llvm.cc
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+28-20Lines changed: 28 additions & 20 deletions b/‎paddle/cinn/backends/llvm/codegen_llvm.cc
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diff --git a/‎paddle/cinn/backends/llvm/execution_engine_test.cc
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+1-1Lines changed: 1 addition & 1 deletion b/‎paddle/cinn/backends/llvm/execution_engine_test.cc
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diff --git a/‎paddle/cinn/common/CMakeLists.txt
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+1Lines changed: 1 addition & 0 deletions b/‎paddle/cinn/common/CMakeLists.txt
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@@ -434,9 +434,9 @@ void MultiLevelTiling::ApplyCacheWrite(ir::IRSchedule* ir_schedule,
   }
 }
 
-const std::unordered_map<cinn::common::Target::Arch, MultiLevelTiling::Config>
+const std::unordered_map<cinn::common::Arch, MultiLevelTiling::Config>
     MultiLevelTiling::kConfigs{
-        {cinn::common::Target::Arch::NVGPU,
+        {cinn::common::NVGPUArch{},
          MultiLevelTiling::Config{
              /*bind_axis*/ std::vector<std::string>{"blockIdx.x",
                                                     "threadIdx.x"},
@@ -446,7 +446,7 @@ const std::unordered_map<cinn::common::Target::Arch, MultiLevelTiling::Config>
              /*write_cache_memory_type*/ std::string("local"),
              /*write_cache_levels*/ std::vector<int>{3},
          }},
-        {cinn::common::Target::Arch::X86,
+        {cinn::common::X86Arch{},
          MultiLevelTiling::Config{
              /*bind_axis*/ std::vector<std::string>{},
              /*tile_struct*/ std::string("SSRSRS"),
 
@@ -53,7 +53,7 @@ class MultiLevelTiling : public AutoGenRule {
     std::vector<int> write_cache_levels;
   };
 
-  static const std::unordered_map<cinn::common::Target::Arch, Config> kConfigs;
+  static const std::unordered_map<cinn::common::Arch, Config> kConfigs;
 
   MultiLevelTiling(const cinn::common::Target& target, const Config& config);
   ~MultiLevelTiling() = default;
 
@@ -301,7 +301,7 @@ TEST(TuneTask, SerializeToString) {
   }
 
 #ifdef CINN_WITH_CUDA
-  std::string single_add_str = R"ROC(Target<linux,nvgpu,64>
+  std::string single_add_str = R"ROC(Target<linux,NVGPU,64>
 
 Group {
   (var_1->float32[32,24]) = elementwise_add(A->float32[32,24], B->float32[32,24])
@@ -324,15 +324,15 @@ Group {
   fused_tasks[0].Initialize(shape_dict, dtype_dict, &op_lowerer);
 
 #ifdef CINN_WITH_CUDA
-  std::string fused_expected_str = R"ROC(Target<linux,nvgpu,64>
+  std::string fused_expected_str = R"ROC(Target<linux,NVGPU,64>
 
 Group {
   (var_1->float32[32,24]) = elementwise_add(A->float32[32,24], B->float32[32,24])
   (var_2->float32[32,24]) = elementwise_add(A->float32[32,24], var_1->float32[32,24])
 }
 )ROC";
 #else
-  std::string fused_expected_str = R"ROC(Target<linux,x86,64>
+  std::string fused_expected_str = R"ROC(Target<linux,X86,64>
 
 Group {
   (var_1->float32[32,24]) = elementwise_add(A->float32[32,24], B->float32[32,24])
 
@@ -61,7 +61,7 @@ TEST(CodeGenC, module) {
   LOG(INFO) << "C.body: " << C->get_compute_op()->body.front();
 
   Target target;
-  target.arch = Target::Arch::X86;
+  target.arch = common::X86Arch{};
   target.bits = Target::Bit::k32;
   target.os = Target::OS::Linux;
   Module::Builder builder("module1", target);
 
@@ -41,7 +41,7 @@ TEST(CodeGenCX86, basic) {
   const int bn = 32;
 
   Target target;
-  target.arch = Target::Arch ::X86;
+  target.arch = common::X86Arch{};
   target.bits = Target::Bit ::k32;
   target.os = Target::OS ::Linux;
 
 
@@ -30,6 +30,7 @@
 #include "paddle/cinn/runtime/cuda/cuda_util.h"
 #include "paddle/cinn/runtime/flags.h"
 #endif
+#include "paddle/cinn/adt/adt.h"
 
 PD_DECLARE_string(cinn_source_code_save_path);
 PD_DECLARE_string(cinn_dump_group_lowered_func);
@@ -229,41 +230,41 @@ void SourceCodePrint::write(const std::string& source_code) {
 }
 
 void Compiler::Build(const Module& module, const std::string& code) {
-  if (target_.arch == Target::Arch::NVGPU) {
-    CompileCudaModule(module, code);
-  } else if (target_.arch == Target::Arch::X86) {
-    CompileX86Module(module);
-  } else {
-    CINN_NOT_IMPLEMENTED
-  }
+  auto PatternMatch =
+      adt::match{[&](common::UnknownArch) { CINN_NOT_IMPLEMENTED; },
+                 [&](common::X86Arch) { CompileX86Module(module); },
+                 [&](common::ARMArch) { CINN_NOT_IMPLEMENTED; },
+                 [&](common::NVGPUArch) { CompileCudaModule(module, code); }};
+  return std::visit(PatternMatch, target_.arch.variant());
 }
 
 std::string Compiler::GetSourceCode(const ir::Module& module) {
-  if (target_.arch == Target::Arch::NVGPU) {
+  return target_.arch.Visit(adt::match{
+      [&](common::UnknownArch) -> std::string { CINN_NOT_IMPLEMENTED; },
+      [&](common::X86Arch) -> std::string { CINN_NOT_IMPLEMENTED; },
+      [&](common::ARMArch) -> std::string { CINN_NOT_IMPLEMENTED; },
+      [&](common::NVGPUArch) -> std::string {
 #ifdef CINN_WITH_CUDA
-    auto _host_module_device_module_ =
-        SplitCudaAndHostModule(module);  // NOLINT
-    auto& host_module = std::get<0>(_host_module_device_module_);
-    auto& device_module = std::get<1>(_host_module_device_module_);
-    CodeGenCUDA_Dev codegen(target_);
-    auto source_code = codegen.Compile(device_module);
-    return source_code;
+        auto _host_module_device_module_ =
+            SplitCudaAndHostModule(module);  // NOLINT
+        auto& host_module = std::get<0>(_host_module_device_module_);
+        auto& device_module = std::get<1>(_host_module_device_module_);
+        CodeGenCUDA_Dev codegen(target_);
+        auto source_code = codegen.Compile(device_module);
+        return source_code;
 #else
-    CINN_NOT_IMPLEMENTED
+        CINN_NOT_IMPLEMENTED
 #endif
-  } else {
-    CINN_NOT_IMPLEMENTED
-  }
+      }});
 }
 
 void Compiler::BuildDefault(const Module& module) {
-  if (target_.arch == Target::Arch::NVGPU) {
-    CompileCudaModule(module);
-  } else if (target_.arch == Target::Arch::X86) {
-    CompileX86Module(module);
-  } else {
-    CINN_NOT_IMPLEMENTED
-  }
+  target_.arch.Visit(adt::match{
+      [&](common::UnknownArch) { CINN_NOT_IMPLEMENTED; },
+      [&](common::X86Arch) { CompileX86Module(module); },
+      [&](common::ARMArch) { CINN_NOT_IMPLEMENTED; },
+      [&](common::NVGPUArch) { CompileCudaModule(module); },
+  });
 }
 
 void Compiler::CompileCudaModule(const Module& module,
 
@@ -93,15 +93,12 @@ namespace cinn {
 namespace backends {
 
 static const char* TargetToBackendRepr(Target target) {
-  switch (target.arch) {
-    case Target::Arch::X86:
-      return backend_llvm_host;
-    case Target::Arch::NVGPU:
-      return backend_nvgpu;
-    default:
-      CINN_NOT_IMPLEMENTED
-  }
-  return nullptr;
+  return target.arch.Visit(adt::match{
+      [&](common::UnknownArch) -> const char* { CINN_NOT_IMPLEMENTED; },
+      [&](common::X86Arch) -> const char* { return backend_llvm_host; },
+      [&](common::ARMArch) -> const char* { CINN_NOT_IMPLEMENTED; },
+      [&](common::NVGPUArch) -> const char* { return backend_nvgpu; },
+  });
 }
 
 /**
 
@@ -1366,32 +1366,40 @@ llvm::Value *CodeGenLLVM::CreateVecSlice(llvm::Value *vec,
       vec, undef, llvm::ConstantVector::get(indices));
 }
 
+int GetNaiveVecAlignmentImpl(common::UnknownArch, const Target &target) {
+  PADDLE_THROW(phi::errors::InvalidArgument("unknown Arch found"));
+}
+
+int GetNaiveVecAlignmentImpl(common::X86Arch, const Target &target) {
+  if (target.bits == Target::Bit::k32) {
+    return 256;
+  } else if (target.bits == Target::Bit::k64) {
+    return 512;
+  }
+  PADDLE_THROW(phi::errors::InvalidArgument("get unknown bits"));
+}
+
+int GetNaiveVecAlignmentImpl(common::ARMArch, const Target &target) {
+  return 128;
+}
+
+int GetNaiveVecAlignmentImpl(common::NVGPUArch, const Target &target) {
+  return 128;
+}
+
+int GetNaiveVecAlignment(const Target &target) {
+  return std::visit(
+      [&](const auto &impl) { return GetNaiveVecAlignmentImpl(impl, target); },
+      target.arch.variant());
+}
+
 void CodeGenLLVM::InitTarget(const Target &target) {
   llvm::InitializeAllTargetInfos();
   llvm::InitializeAllTargets();
   llvm::InitializeAllTargetMCs();
   llvm::InitializeAllAsmParsers();
   llvm::InitializeAllAsmPrinters();
-  switch (target.arch) {
-    case Target::Arch::X86:
-      if (target.bits == Target::Bit::k32) {
-        naive_vec_alignment_ = 256;
-      } else if (target.bits == Target::Bit::k64) {
-        naive_vec_alignment_ = 512;
-      } else {
-        PADDLE_THROW(phi::errors::InvalidArgument("get unknown bits"));
-      }
-      break;
-    case Target::Arch::ARM:
-      naive_vec_alignment_ = 128;
-      break;
-    case Target::Arch::NVGPU:
-      naive_vec_alignment_ = 128;
-      break;
-    case Target::Arch::Unk:
-      PADDLE_THROW(phi::errors::InvalidArgument("unknown Arch found"));
-      break;
-  }
+  naive_vec_alignment_ = GetNaiveVecAlignment(target);
 }
 
 bool LLVM_WillVarLowerAsPointer(const std::string &var_name) {
 
@@ -108,7 +108,7 @@ auto CreateTestCinnModule() {
   C->Bind(C_buf);
 
   cinn::common::Target target;
-  target.arch = cinn::common::Target::Arch::X86;
+  target.arch = cinn::common::X86Arch{};
   target.bits = cinn::common::Target::Bit::k32;
   target.os = cinn::common::Target::OS::Linux;
   ir::Module::Builder builder("module1", target);
 
@@ -7,6 +7,7 @@ gather_srcs(
   cinn_value.cc
   type.cc
   target.cc
+  arch_util.cc
   object.cc
   debug_manager.cc
   info_registry.cc