Fix DECLEAR_ DECLARE_ (#62514)

co63oc · web-flow · commit 536a85ece8cc · 2024-03-08T10:41:49.000+08:00
diff --git a/paddle/phi/kernels/logical_kernel.h b/paddle/phi/kernels/logical_kernel.h
@@ -18,17 +18,17 @@ limitations under the License. */
 
 namespace phi {
 
-#define DECLEAR_LOGICAL_BINARY_KERNEL(type)          \
+#define DECLARE_LOGICAL_BINARY_KERNEL(type)          \
   template <typename T, typename Context>            \
   void Logical##type##Kernel(const Context& dev_ctx, \
                              const DenseTensor& x,   \
                              const DenseTensor& y,   \
                              DenseTensor* out);
 
-DECLEAR_LOGICAL_BINARY_KERNEL(And)
-DECLEAR_LOGICAL_BINARY_KERNEL(Or)
-DECLEAR_LOGICAL_BINARY_KERNEL(Xor)
-#undef DECLEAR_LOGICAL_BINARY_KERNEL
+DECLARE_LOGICAL_BINARY_KERNEL(And)
+DECLARE_LOGICAL_BINARY_KERNEL(Or)
+DECLARE_LOGICAL_BINARY_KERNEL(Xor)
+#undef DECLARE_LOGICAL_BINARY_KERNEL
 
 template <typename T, typename Context>
 void LogicalNotKernel(const Context& dev_ctx,
diff --git a/paddle/phi/kernels/xpu/bmm_grad_kernel.cc b/paddle/phi/kernels/xpu/bmm_grad_kernel.cc
@@ -28,14 +28,14 @@ void MatMul(const Context& dev_ctx,
   using XPUType = typename XPUTypeTrait<T>::Type;
   dev_ctx.template Alloc<T>(out);
   xpu::Context* xpu_ctx = dev_ctx.x_context();
-  int fccal_type = FCCalcType<XPUType>();
-  if (fccal_type == XPUFCCalcType::FC_INT32) {
+  int fc_calc_type = FCCalcType<XPUType>();
+  if (fc_calc_type == XPUFCCalcType::FC_INT32) {
     MatMulXPUFunction<T, int32_t>(a, b, out, trans_a, trans_b, xpu_ctx);
-  } else if (fccal_type == XPUFCCalcType::FC_FLOAT) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_FLOAT) {
     MatMulXPUFunction<T, float>(a, b, out, trans_a, trans_b, xpu_ctx);
-  } else if (fccal_type == XPUFCCalcType::FC_INT32_WITH_LL) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_INT32_WITH_LL) {
     MatMulXPUFunction<T, int_with_ll_t>(a, b, out, trans_a, trans_b, xpu_ctx);
-  } else if (fccal_type == XPUFCCalcType::FC_FLOAT16) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_FLOAT16) {
     MatMulXPUFunction<T, float16>(a, b, out, trans_a, trans_b, xpu_ctx);
   } else {
     MatMulXPUFunction<T, int16_t>(a, b, out, trans_a, trans_b, xpu_ctx);
diff --git a/paddle/phi/kernels/xpu/bmm_kernel.cc b/paddle/phi/kernels/xpu/bmm_kernel.cc
@@ -63,14 +63,14 @@ void BmmKernel(const Context& dev_ctx,
           y_dims[1]));
 
   xpu::Context* xpu_ctx = dev_ctx.x_context();
-  int fccal_type = FCCalcType<XPUType>();
-  if (fccal_type == XPUFCCalcType::FC_INT32) {
+  int fc_calc_type = FCCalcType<XPUType>();
+  if (fc_calc_type == XPUFCCalcType::FC_INT32) {
     MatMulXPUFunction<T, int32_t>(x, y, out, trans_x, trans_y, xpu_ctx);
-  } else if (fccal_type == XPUFCCalcType::FC_FLOAT) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_FLOAT) {
     MatMulXPUFunction<T, float>(x, y, out, trans_x, trans_y, xpu_ctx);
-  } else if (fccal_type == XPUFCCalcType::FC_INT32_WITH_LL) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_INT32_WITH_LL) {
     MatMulXPUFunction<T, int_with_ll_t>(x, y, out, trans_x, trans_y, xpu_ctx);
-  } else if (fccal_type == XPUFCCalcType::FC_FLOAT16) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_FLOAT16) {
     MatMulXPUFunction<T, float16>(x, y, out, trans_x, trans_y, xpu_ctx);
   } else {
     MatMulXPUFunction<T, int16_t>(x, y, out, trans_x, trans_y, xpu_ctx);
diff --git a/paddle/phi/kernels/xpu/bmm_xpu_utils.h b/paddle/phi/kernels/xpu/bmm_xpu_utils.h
@@ -40,7 +40,7 @@ static void MatMulXPUFunction(const DenseTensor& x,
   int k = mat_dim_a.width_;
   int batch_size = mat_dim_a.batch_size_;
   // batch matmul
-  int fccal_type = FCCalcType<XPUType>();
+  int fc_calc_type = FCCalcType<XPUType>();
   decltype(&xblas_fc_batch_wrapper<XPUType, int16_t, float>)
       xblas_fc_batch_api_list[6] = {
           &xblas_fc_batch_wrapper<XPUType, int16_t, float>,
@@ -51,8 +51,8 @@ static void MatMulXPUFunction(const DenseTensor& x,
           &xblas_fc_batch_wrapper<XPUType, XPUTypeFP16, float>,
       };
 
-  auto xblas_fc_batch_api = xblas_fc_batch_api_list[fccal_type];
-  if (fccal_type == XPUFCCalcType::FC_FLOAT16 &&
+  auto xblas_fc_batch_api = xblas_fc_batch_api_list[fc_calc_type];
+  if (fc_calc_type == XPUFCCalcType::FC_FLOAT16 &&
       std::getenv("XPU_PADDLE_FC_FLOAT16") != nullptr) {
     xblas_fc_batch_api =
         &xblas_fc_batch_wrapper<XPUType, XPUTypeFP16, XPUTypeFP16>;
diff --git a/paddle/phi/kernels/xpu/conv_grad_kernel.cc b/paddle/phi/kernels/xpu/conv_grad_kernel.cc
@@ -107,8 +107,8 @@ void ConvGradKernel(const Context& dev_ctx,
       filter_grad_data_ptr = filter_grad_data_tmp;
     }
   }
-  int fccal_type = FCCalcType<XPUType>();
-  if (fccal_type == XPUFCCalcType::FC_INT32) {
+  int fc_calc_type = FCCalcType<XPUType>();
+  if (fc_calc_type == XPUFCCalcType::FC_INT32) {
     int r =
         xpu::conv2d_grad<XPUType, XPUType, XPUType, int>(dev_ctx.x_context(),
                                                          input_data,
@@ -134,7 +134,7 @@ void ConvGradKernel(const Context& dev_ctx,
                                                          is_nchw);
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "conv2d_grad");
 
-  } else if (fccal_type == XPUFCCalcType::FC_FLOAT) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_FLOAT) {
     int r =
         xpu::conv2d_grad<XPUType, XPUType, XPUType, float>(dev_ctx.x_context(),
                                                            input_data,
@@ -160,7 +160,7 @@ void ConvGradKernel(const Context& dev_ctx,
                                                            is_nchw);
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "conv2d_grad");
 
-  } else if (fccal_type == XPUFCCalcType::FC_INT32_WITH_LL) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_INT32_WITH_LL) {
     int r = xpu::conv2d_grad<XPUType, XPUType, XPUType, int_with_ll_t>(
         dev_ctx.x_context(),
         input_data,
@@ -334,8 +334,8 @@ void Conv3DGradKernel(const Context& dev_ctx,
       filter_grad_data_ptr = filter_grad_data_tmp;
     }
   }
-  int fccal_type = FCCalcType<XPUType>();
-  if (fccal_type == XPUFCCalcType::FC_INT32) {
+  int fc_calc_type = FCCalcType<XPUType>();
+  if (fc_calc_type == XPUFCCalcType::FC_INT32) {
     int r =
         xpu::conv3d_grad<XPUType, XPUType, XPUType, int>(dev_ctx.x_context(),
                                                          input_data,
@@ -361,7 +361,7 @@ void Conv3DGradKernel(const Context& dev_ctx,
                                                          nullptr,
                                                          is_ncdhw);
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "conv3d_grad");
-  } else if (fccal_type == XPUFCCalcType::FC_FLOAT) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_FLOAT) {
     int r =
         xpu::conv3d_grad<XPUType, XPUType, XPUType, float>(dev_ctx.x_context(),
                                                            input_data,
@@ -387,7 +387,7 @@ void Conv3DGradKernel(const Context& dev_ctx,
                                                            nullptr,
                                                            is_ncdhw);
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "conv3d_grad");
-  } else if (fccal_type == XPUFCCalcType::FC_INT32_WITH_LL) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_INT32_WITH_LL) {
     int r = xpu::conv3d_grad<XPUType, XPUType, XPUType, int_with_ll_t>(
         dev_ctx.x_context(),
         input_data,
diff --git a/paddle/phi/kernels/xpu/conv_kernel.cc b/paddle/phi/kernels/xpu/conv_kernel.cc
@@ -89,8 +89,8 @@ void ConvKernel(const Context& dev_ctx,
     filter_data_ptr = reinterpret_cast<const XPUType*>(filter_data_tmp);
   }
 
-  int fccal_type = FCCalcType<XPUType>();
-  if (fccal_type == XPUFCCalcType::FC_INT32) {
+  int fc_calc_type = FCCalcType<XPUType>();
+  if (fc_calc_type == XPUFCCalcType::FC_INT32) {
     int r = xpu::conv2d<XPUType, XPUType, XPUType, int>(dev_ctx.x_context(),
                                                         input_data,
                                                         filter_data_ptr,
@@ -110,7 +110,7 @@ void ConvKernel(const Context& dev_ctx,
                                                         nullptr,
                                                         is_nchw);
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "conv2d");
-  } else if (fccal_type == XPUFCCalcType::FC_FLOAT) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_FLOAT) {
     int r = xpu::conv2d<XPUType, XPUType, XPUType, float>(dev_ctx.x_context(),
                                                           input_data,
                                                           filter_data_ptr,
@@ -130,7 +130,7 @@ void ConvKernel(const Context& dev_ctx,
                                                           nullptr,
                                                           is_nchw);
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "conv2d");
-  } else if (fccal_type == XPUFCCalcType::FC_INT32_WITH_LL) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_INT32_WITH_LL) {
     int r = xpu::conv2d<XPUType, XPUType, XPUType, int_with_ll_t>(
         dev_ctx.x_context(),
         input_data,
@@ -261,8 +261,8 @@ void Conv3DKernel(const Context& dev_ctx,
     filter_data_ptr = reinterpret_cast<const XPUType*>(filter_data_tmp);
   }
 
-  int fccal_type = FCCalcType<XPUType>();
-  if (fccal_type == XPUFCCalcType::FC_INT32) {
+  int fc_calc_type = FCCalcType<XPUType>();
+  if (fc_calc_type == XPUFCCalcType::FC_INT32) {
     int r = xpu::conv3d<XPUType, XPUType, XPUType, int>(dev_ctx.x_context(),
                                                         input_data,
                                                         filter_data_ptr,
@@ -283,7 +283,7 @@ void Conv3DKernel(const Context& dev_ctx,
                                                         nullptr,
                                                         is_ncdhw);
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "conv3d");
-  } else if (fccal_type == XPUFCCalcType::FC_FLOAT) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_FLOAT) {
     int r = xpu::conv3d<XPUType, XPUType, XPUType, float>(dev_ctx.x_context(),
                                                           input_data,
                                                           filter_data_ptr,
@@ -305,7 +305,7 @@ void Conv3DKernel(const Context& dev_ctx,
                                                           is_ncdhw);
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "conv3d");
 
-  } else if (fccal_type == XPUFCCalcType::FC_INT32_WITH_LL) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_INT32_WITH_LL) {
     int r = xpu::conv3d<XPUType, XPUType, XPUType, int_with_ll_t>(
         dev_ctx.x_context(),
         input_data,
diff --git a/paddle/phi/kernels/xpu/conv_transpose_grad_kernel.cc b/paddle/phi/kernels/xpu/conv_transpose_grad_kernel.cc
@@ -69,9 +69,9 @@ void Conv2dTransposeGradKernel(const Context& ctx,
   if (dfilter) {
     ctx.template Alloc<T>(dfilter);
   }
-  int fccal_type = FCCalcType<T>();
-  if (fccal_type == XPUFCCalcType::FC_INT32 ||
-      fccal_type == XPUFCCalcType::FC_INT32_WITH_LL) {
+  int fc_calc_type = FCCalcType<T>();
+  if (fc_calc_type == XPUFCCalcType::FC_INT32 ||
+      fc_calc_type == XPUFCCalcType::FC_INT32_WITH_LL) {
     // xpu api do not support int31 quantization now.
     int r = xpu::conv2d_transpose_grad<float, float, float, int_with_ll_t>(
         ctx.x_context(),
diff --git a/paddle/phi/kernels/xpu/conv_transpose_kernel.cc b/paddle/phi/kernels/xpu/conv_transpose_kernel.cc
@@ -76,8 +76,8 @@ void Conv2dTransposeKernel(const Context& ctx,
   const int img_xh = static_cast<int>(out->dims()[2]);
   const int img_xw = static_cast<int>(out->dims()[3]);
 
-  int fccal_type = FCCalcType<XPUType>();
-  if (fccal_type == XPUFCCalcType::FC_INT32) {
+  int fc_calc_type = FCCalcType<XPUType>();
+  if (fc_calc_type == XPUFCCalcType::FC_INT32) {
     int r = xpu::conv2d_transpose_v2<float, float, float, int32_t>(
         ctx.x_context(),
         x.data<float>(),
@@ -98,7 +98,7 @@ void Conv2dTransposeKernel(const Context& ctx,
         nullptr,
         true);
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "conv2d_transpose_v2");
-  } else if (fccal_type == XPUFCCalcType::FC_FLOAT) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_FLOAT) {
     int r = xpu::conv2d_transpose_v2<float, float, float, float>(
         ctx.x_context(),
         x.data<float>(),
@@ -119,7 +119,7 @@ void Conv2dTransposeKernel(const Context& ctx,
         nullptr,
         true);
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "conv2d_transpose_v2");
-  } else if (fccal_type == XPUFCCalcType::FC_INT32_WITH_LL) {
+  } else if (fc_calc_type == XPUFCCalcType::FC_INT32_WITH_LL) {
     if (output_size.size()) {
       VLOG(4) << "int_with_ll quantization is not supported when output_size "
                  "is specified, "
diff --git a/paddle/phi/kernels/xpu/xpu_api_wrapper.h b/paddle/phi/kernels/xpu/xpu_api_wrapper.h
@@ -311,7 +311,7 @@ static void xblas_fc_wrapper(xpu::Context* ctx,
   }
 }
 
-#define DECLEAR_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUType, FCT)          \
+#define DECLARE_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUType, FCT)          \
   template <>                                                       \
   void xblas_fc_wrapper<XPUType, FCT>(xpu::Context * ctx,           \
                                       const XPUType* x,             \
@@ -340,12 +340,12 @@ static void xblas_fc_wrapper(xpu::Context* ctx,
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "xblas_fc_wrapper");             \
   }
 
-DECLEAR_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeBF16, int_with_ll_t)
-DECLEAR_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeBF16, int16_t)
-DECLEAR_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeBF16, int32_t)
-DECLEAR_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeBF16, XPUTypeFP16)
-DECLEAR_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeFP16, int32_t)
-DECLEAR_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeFP16, tfloat32)
+DECLARE_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeBF16, int_with_ll_t)
+DECLARE_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeBF16, int16_t)
+DECLARE_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeBF16, int32_t)
+DECLARE_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeBF16, XPUTypeFP16)
+DECLARE_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeFP16, int32_t)
+DECLARE_UNSUPPORTED_XBLAS_FC_WRAPPER(XPUTypeFP16, tfloat32)
 
 template <typename XPUType, typename FCT, typename TGEMM_OUT>
 static void xblas_fc_batch_wrapper(xpu::Context* xpu_ctx,
@@ -386,7 +386,7 @@ static void xblas_fc_batch_wrapper(xpu::Context* xpu_ctx,
   PADDLE_ENFORCE_XDNN_SUCCESS(r, "xblas_fc_batch_wrapper");
 }
 
-#define DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUType, FCT, TGEMM_OUT) \
+#define DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUType, FCT, TGEMM_OUT) \
   template <>                                                               \
   void xblas_fc_batch_wrapper<XPUType, FCT, TGEMM_OUT>(                     \
       xpu::Context * xpu_ctx,                                               \
@@ -410,23 +410,23 @@ static void xblas_fc_batch_wrapper(xpu::Context* xpu_ctx,
     PADDLE_ENFORCE_XDNN_SUCCESS(r, "xblas_fc_batched");                     \
   }
 
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16,
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16,
                                            int_with_ll_t,
                                            XPUTypeFP16)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeFP16, tfloat32, XPUTypeFP16)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, float, XPUTypeFP16)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16,
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeFP16, tfloat32, XPUTypeFP16)
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, float, XPUTypeFP16)
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16,
                                            XPUTypeFP16,
                                            XPUTypeFP16)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, int32_t, XPUTypeFP16)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, int16_t, XPUTypeFP16)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeFP16, int32_t, XPUTypeFP16)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, int_with_ll_t, float)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, XPUTypeFP16, float)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeFP16, tfloat32, float)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, int32_t, float)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, int16_t, float)
-DECLEAR_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeFP16, int32_t, float)
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, int32_t, XPUTypeFP16)
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, int16_t, XPUTypeFP16)
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeFP16, int32_t, XPUTypeFP16)
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, int_with_ll_t, float)
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, XPUTypeFP16, float)
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeFP16, tfloat32, float)
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, int32_t, float)
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeBF16, int16_t, float)
+DECLARE_UNSUPPORTED_XBLAS_FC_BATCH_WRAPPER(XPUTypeFP16, int32_t, float)
 
 template <typename T>
 static void MatMulXPUFunction(
@@ -439,7 +439,7 @@ static void MatMulXPUFunction(
     bool is_grad = false,
     xpu::Activation_t act = xpu::Activation_t::LINEAR) {
   using XPUType = typename XPUTypeTrait<T>::Type;
-  int fccal_type = FCCalcType<XPUType>();
+  int fc_calc_type = FCCalcType<XPUType>();
 
   decltype(&xblas_fc_wrapper<XPUType, int16_t>) xblas_fc_api_list[6] = {
       &xblas_fc_wrapper<XPUType, int16_t>,
@@ -460,16 +460,16 @@ static void MatMulXPUFunction(
           &xblas_fc_batch_wrapper<XPUType, XPUTypeFP16, float>,
       };
 
-  auto xblas_fc_api = xblas_fc_api_list[fccal_type];
+  auto xblas_fc_api = xblas_fc_api_list[fc_calc_type];
 
   if (std::getenv("XPU_PADDLE_FC_GRAD_LOCAL") != nullptr) {
     if (is_grad) {
       xblas_fc_api = xblas_fc_api_list[2];
     }
   }
-  auto xblas_fc_batch_api = xblas_fc_batch_api_list[fccal_type];
+  auto xblas_fc_batch_api = xblas_fc_batch_api_list[fc_calc_type];
 
-  if (fccal_type == XPUFCCalcType::FC_FLOAT16 &&
+  if (fc_calc_type == XPUFCCalcType::FC_FLOAT16 &&
       std::getenv("XPU_PADDLE_FC_FLOAT16") != nullptr) {
     xblas_fc_batch_api =
         &xblas_fc_batch_wrapper<XPUType, XPUTypeFP16, XPUTypeFP16>;
