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diff --git a/‎paddle/cinn/hlir/dialect/operator/ir/manual_op.cc
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+1-1Lines changed: 1 addition & 1 deletion b/‎paddle/cinn/hlir/dialect/operator/ir/manual_op.cc
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+1-1Lines changed: 1 addition & 1 deletion
diff --git a/‎paddle/cinn/hlir/dialect/operator/ir/manual_op.h
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+1-1Lines changed: 1 addition & 1 deletion b/‎paddle/cinn/hlir/dialect/operator/ir/manual_op.h
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+1-1Lines changed: 1 addition & 1 deletion
diff --git a/‎paddle/cinn/hlir/dialect/runtime/ir/jit_kernel_op.cc
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+1-1Lines changed: 1 addition & 1 deletion b/‎paddle/cinn/hlir/dialect/runtime/ir/jit_kernel_op.cc
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diff --git a/‎paddle/cinn/hlir/dialect/runtime/ir/jit_kernel_op.h
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+1-1Lines changed: 1 addition & 1 deletion b/‎paddle/cinn/hlir/dialect/runtime/ir/jit_kernel_op.h
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diff --git a/‎paddle/fluid/ir_adaptor/translator/program_translator.cc
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+2Lines changed: 2 additions & 0 deletions b/‎paddle/fluid/ir_adaptor/translator/program_translator.cc
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+2Lines changed: 2 additions & 0 deletions
diff --git a/‎paddle/fluid/pir/dialect/kernel/ir/kernel_op.cc
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+2-2Lines changed: 2 additions & 2 deletions b/‎paddle/fluid/pir/dialect/kernel/ir/kernel_op.cc
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+2-2Lines changed: 2 additions & 2 deletions
diff --git a/‎paddle/fluid/pir/dialect/kernel/ir/kernel_op.h
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+2-2Lines changed: 2 additions & 2 deletions b/‎paddle/fluid/pir/dialect/kernel/ir/kernel_op.h
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+2-2Lines changed: 2 additions & 2 deletions
diff --git a/‎paddle/fluid/pir/dialect/op_generator/op_gen.py
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+1-1Lines changed: 1 addition & 1 deletion b/‎paddle/fluid/pir/dialect/op_generator/op_gen.py
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diff --git a/‎paddle/fluid/pir/dialect/op_generator/op_verify_gen.py
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+2-2Lines changed: 2 additions & 2 deletions b/‎paddle/fluid/pir/dialect/op_generator/op_verify_gen.py
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+2-2Lines changed: 2 additions & 2 deletions
diff --git a/‎paddle/fluid/pir/dialect/operator/ir/control_flow_op.cc
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+69-1Lines changed: 69 additions & 1 deletion b/‎paddle/fluid/pir/dialect/operator/ir/control_flow_op.cc
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+69-1Lines changed: 69 additions & 1 deletion
@@ -44,7 +44,7 @@ std::vector<pir::Operation *> GroupOp::ops() {
                                        inner_block->end());
 }
 
-void GroupOp::Verify() {}
+void GroupOp::VerifySig() {}
 
 void GroupOp::Print(pir::IrPrinter &printer) {
   auto &os = printer.os;
 
@@ -36,7 +36,7 @@ class GroupOp : public pir::Op<GroupOp> {
   pir::Block *block();
   std::vector<pir::Operation *> ops();
 
-  void Verify();
+  void VerifySig();
   void Print(pir::IrPrinter &printer);  // NOLINT
 };
 
 
@@ -22,7 +22,7 @@ namespace dialect {
 
 const char* JitKernelOp::attributes_name[attributes_num] = {kAttrName};
 
-void JitKernelOp::Verify() {
+void JitKernelOp::VerifySig() {
   VLOG(4) << "Verifying inputs, outputs and attributes for: JitKernelOp.";
 
   auto& attributes = this->attributes();
 
@@ -51,7 +51,7 @@ class JitKernelOp : public ::pir::Op<JitKernelOp> {
 
   hlir::framework::Instruction* instruction();
 
-  void Verify();
+  void VerifySig();
 };
 
 }  // namespace dialect
 
@@ -367,6 +367,8 @@ pir::Operation* ProgramTranslator::TranslateCondIfOperation(
                    true);
   }
   VLOG(4) << "[general op][conditional_block] IfOp false block translate end.";
+
+  operation->Verify();
   VLOG(4) << "[general op][conditional_block] IfOp translate end.";
   return operation;
 }
 
@@ -25,7 +25,7 @@ const char* PhiKernelOp::attributes_name[attributes_num] = {  // NOLINT
     "kernel_name",
     "kernel_key"};
 
-void PhiKernelOp::Verify() {
+void PhiKernelOp::VerifySig() {
   VLOG(4) << "Verifying inputs, outputs and attributes for: PhiKernelOp.";
 
   auto& attributes = this->attributes();
@@ -64,7 +64,7 @@ const char* LegacyKernelOp::attributes_name[attributes_num] = {  // NOLINT
     "kernel_name",
     "kernel_key"};
 
-void LegacyKernelOp::Verify() {
+void LegacyKernelOp::VerifySig() {
   VLOG(4) << "Verifying inputs, outputs and attributes for: LegacyKernelOp.";
 
   auto& attributes = this->attributes();
 
@@ -29,7 +29,7 @@ class PhiKernelOp : public pir::Op<PhiKernelOp> {
   std::string op_name();
   std::string kernel_name();
   phi::KernelKey kernel_key();
-  void Verify();
+  void VerifySig();
 };
 
 class LegacyKernelOp : public pir::Op<LegacyKernelOp> {
@@ -41,7 +41,7 @@ class LegacyKernelOp : public pir::Op<LegacyKernelOp> {
   std::string op_name();
   std::string kernel_name();
   phi::KernelKey kernel_key();
-  void Verify();
+  void VerifySig();
 };
 
 }  // namespace dialect
 
@@ -99,7 +99,7 @@ class {op_name} : public pir::Op<{op_name}{interfaces}{traits}> {{
   {build_mutable_attr_is_input}
   {build_attr_num_over_1}
   {build_mutable_attr_is_input_attr_num_over_1}
-  void Verify();
+  void VerifySig();
 {get_inputs_and_outputs}
 {exclusive_interface}
 }};
 
@@ -14,7 +14,7 @@
 
 # verify
 OP_VERIFY_TEMPLATE = """
-void {op_name}::Verify() {{
+void {op_name}::VerifySig() {{
   VLOG(4) << "Start Verifying inputs, outputs and attributes for: {op_name}.";
   VLOG(4) << "Verifying inputs:";
   {{
@@ -36,7 +36,7 @@
 """
 
 GRAD_OP_VERIFY_TEMPLATE = """
-void {op_name}::Verify() {{}}
+void {op_name}::VerifySig() {{}}
 """
 
 INPUT_TYPE_CHECK_TEMPLATE = """
 
@@ -19,6 +19,7 @@ paddle::dialect::IfOp, paddle::dialect::WhileOp
 
 #include "paddle/phi/core/enforce.h"
 #include "paddle/pir/core/builder.h"
+#include "paddle/pir/core/builtin_type.h"
 #include "paddle/pir/core/ir_printer.h"
 #include "paddle/pir/core/operation_utils.h"
 #include "paddle/pir/dialect/control_flow/ir/cf_ops.h"
@@ -109,7 +110,74 @@ void IfOp::Print(pir::IrPrinter &printer) {
   }
   os << "\n }";
 }
-void IfOp::Verify() {}
+void IfOp::VerifySig() {
+  VLOG(4) << "Start Verifying inputs, outputs and attributes for: IfOp.";
+  auto input_size = num_operands();
+  PADDLE_ENFORCE_EQ(
+      input_size,
+      1u,
+      phi::errors::PreconditionNotMet(
+          "The size %d of inputs must be equal to 1.", input_size));
+
+  if ((*this)->operand_source(0).type().isa<pir::DenseTensorType>()) {
+    PADDLE_ENFORCE(
+        (*this)
+            ->operand_source(0)
+            .type()
+            .dyn_cast<pir::DenseTensorType>()
+            .dtype()
+            .isa<pir::BoolType>(),
+        phi::errors::PreconditionNotMet(
+            "Type validation failed for the 1th input, it should be a "
+            "bool DenseTensorType."));
+  }
+
+  PADDLE_ENFORCE_EQ((*this)->num_regions(),
+                    2u,
+                    phi::errors::PreconditionNotMet(
+                        "The size %d of regions must be equal to 2.",
+                        (*this)->num_regions()));
+}
+
+void IfOp::VerifyRegion() {
+  VLOG(4) << "Start Verifying sub regions for: IfOp.";
+  PADDLE_ENFORCE_EQ(
+      (*this)->region(0).size(),
+      1u,
+      phi::errors::PreconditionNotMet("The size %d of true_region must be 1.",
+                                      (*this)->region(0).size()));
+
+  if ((*this)->num_results() != 0) {
+    PADDLE_ENFORCE_EQ(
+        (*this)->region(0).size(),
+        (*this)->region(1).size(),
+        phi::errors::PreconditionNotMet("The size %d of true_region must be "
+                                        "equal to the size %d of false_region.",
+                                        (*this)->region(0).size(),
+                                        (*this)->region(1).size()));
+
+    auto *true_last_op = (*this)->region(0).front()->back();
+    auto *false_last_op = (*this)->region(1).front()->back();
+    PADDLE_ENFORCE_EQ(true_last_op->isa<pir::YieldOp>(),
+                      true,
+                      phi::errors::PreconditionNotMet(
+                          "The last of true block must be YieldOp"));
+    PADDLE_ENFORCE_EQ(true_last_op->num_operands(),
+                      (*this)->num_results(),
+                      phi::errors::PreconditionNotMet(
+                          "The size of last of true block op's input must be "
+                          "equal to IfOp's outputs num."));
+    PADDLE_ENFORCE_EQ(false_last_op->isa<pir::YieldOp>(),
+                      true,
+                      phi::errors::PreconditionNotMet(
+                          "The last of false block must be YieldOp"));
+    PADDLE_ENFORCE_EQ(false_last_op->num_operands(),
+                      (*this)->num_results(),
+                      phi::errors::PreconditionNotMet(
+                          "The size of last of false block op's input must be "
+                          "equal to IfOp's outputs num."));
+  }
+}
 
 void WhileOp::Build(pir::Builder &builder,             // NOLINT
                     pir::OperationArgument &argument,  // NOLINT
Original file line number	Diff line number	Diff line change
`@@ -44,7 +44,7 @@ std::vector<pir::Operation *> GroupOp::ops() {`
`44`	`44`	`inner_block->end());`
`45`	`45`	`}`
`46`	`46`
`47`		`-void GroupOp::Verify() {}`
	`47`	`+void GroupOp::VerifySig() {}`
`48`	`48`
`49`	`49`	`void GroupOp::Print(pir::IrPrinter &printer) {`
`50`	`50`	`auto &os = printer.os;`
Original file line number	Diff line number	Diff line change
`@@ -367,6 +367,8 @@ pir::Operation* ProgramTranslator::TranslateCondIfOperation(`
`367`	`367`	`true);`
`368`	`368`	`}`
`369`	`369`	`VLOG(4) << "[general op][conditional_block] IfOp false block translate end.";`
	`370`	`+`
	`371`	`+ operation->Verify();`
`370`	`372`	`VLOG(4) << "[general op][conditional_block] IfOp translate end.";`
`371`	`373`	`return operation;`
`372`	`374`	`}`