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diff --git a/‎cmake/cinn.cmake
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diff --git a/‎paddle/cinn/backends/codegen_device_util.cc
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diff --git a/‎paddle/cinn/backends/codegen_device_util.h
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diff --git a/‎paddle/cinn/backends/compiler.cc
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+19-5Lines changed: 19 additions & 5 deletions b/‎paddle/cinn/backends/compiler.cc
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diff --git a/‎paddle/cinn/backends/compiler.h
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diff --git a/‎paddle/cinn/backends/extern_func_emitter.h
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diff --git a/‎paddle/cinn/backends/extern_func_jit_register.h
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+4-1Lines changed: 4 additions & 1 deletion b/‎paddle/cinn/backends/extern_func_jit_register.h
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diff --git a/‎paddle/cinn/backends/llvm/codegen_llvm.cc
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diff --git a/‎paddle/cinn/common/arch.h
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diff --git a/‎paddle/cinn/common/arch_util.cc
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@@ -104,6 +104,11 @@ if(WITH_GPU)
                                              /usr/lib /usr/lib64 REQUIRED)
 endif()
 
+if(WITH_ROCM)
+  message(STATUS "CINN Compile with ROCM support")
+  add_definitions(-DCINN_WITH_HIP)
+endif()
+
 set(cinnapi_src CACHE INTERNAL "" FORCE)
 set(core_src CACHE INTERNAL "" FORCE)
 set(core_includes CACHE INTERNAL "" FORCE)
 
@@ -122,6 +122,10 @@ void detail::CollectBucketStrategyHostFunctionVisitor::ProcessLoweredFunc(
 #ifdef CINN_WITH_CUDA
         shared_mem_bytes = CalculateSharedMemory(func);
 #endif
+      },
+      [&](common::HygonDCUArchHIP) {
+        PADDLE_THROW(phi::errors::Unimplemented(
+            "CINN todo: new hardware HygonDCUArchHIP"));
       });
 
   VLOG(6) << "Add a call node for func_node->name " << func_node->name << "\n"
@@ -139,6 +143,10 @@ void detail::CollectBucketStrategyHostFunctionVisitor::ProcessLoweredFunc(
       },
       [&](common::NVGPUArch) {
         call_kernel = runtime::intrinsic::call_cuda_kernel;
+      },
+      [&](common::HygonDCUArchHIP) {
+        PADDLE_THROW(phi::errors::Unimplemented(
+            "CINN todo: new hardware HygonDCUArchHIP"));
       });
   ir::Expr call_extern_api =
       ir::Call::Make(Void(),
 
@@ -122,6 +122,10 @@ struct CollectHostFunctionVisitor : public ir::IRMutator<> {
           codegen_dev.Compile(ir::LoweredFunc(func));
           shared_mem_bytes = codegen_dev.GetDynSharedMemOffset();
 #endif
+        },
+        [&](common::HygonDCUArchHIP) {
+          PADDLE_THROW(phi::errors::Unimplemented(
+              "CINN todo: new hardware HygonDCUArchHIP"));
         });
 
     VLOG(6) << "Add a call node for func->name " << func->name << "\n"
@@ -140,6 +144,10 @@ struct CollectHostFunctionVisitor : public ir::IRMutator<> {
                          common::ARMArch>) { CINN_NOT_IMPLEMENTED; },
         [&](common::NVGPUArch) {
           call_kernel = runtime::intrinsic::call_cuda_kernel;
+        },
+        [&](common::HygonDCUArchHIP) {
+          PADDLE_THROW(phi::errors::Unimplemented(
+              "CINN todo: new hardware HygonDCUArchHIP"));
         });
 
     auto call_extern_api =
 
@@ -234,7 +234,8 @@ void Compiler::Build(const Module& module,
       [&](common::UnknownArch) { CINN_NOT_IMPLEMENTED; },
       [&](common::X86Arch) { CompileX86Module(module, end); },
       [&](common::ARMArch) { CINN_NOT_IMPLEMENTED; },
-      [&](common::NVGPUArch) { CompileCudaModule(module, code, end); }};
+      [&](common::NVGPUArch) { CompileCudaModule(module, code, end); },
+      [&](common::HygonDCUArchHIP) { CompileHipModule(module, code, end); }};
   return std::visit(PatternMatch, target_.arch.variant());
 }
 
@@ -261,14 +262,20 @@ std::string Compiler::GetSourceCode(const ir::Module& module) {
 #else
         CINN_NOT_IMPLEMENTED
 #endif
+      },
+      [&](common::HygonDCUArchHIP) -> std::string {
+        PADDLE_THROW(phi::errors::Unimplemented(
+            "CINN todo: new hardware HygonDCUArchHIP"));
       });
 }
 
 void Compiler::BuildDefault(const Module& module) {
-  target_.arch.Match([&](common::UnknownArch) { CINN_NOT_IMPLEMENTED; },
-                     [&](common::X86Arch) { CompileX86Module(module); },
-                     [&](common::ARMArch) { CINN_NOT_IMPLEMENTED; },
-                     [&](common::NVGPUArch) { CompileCudaModule(module); });
+  target_.arch.Match(
+      [&](common::UnknownArch) { CINN_NOT_IMPLEMENTED; },
+      [&](common::X86Arch) { CompileX86Module(module); },
+      [&](common::ARMArch) { CINN_NOT_IMPLEMENTED; },
+      [&](common::NVGPUArch) { CompileCudaModule(module); },
+      [&](common::HygonDCUArchHIP) { CompileHipModule(module); });
 }
 
 namespace {
@@ -348,6 +355,13 @@ void Compiler::CompileCudaModule(const Module& module,
 #endif
 }
 
+void Compiler::CompileHipModule(const Module& module,
+                                const std::string& code,
+                                bool add_module) {
+  PADDLE_THROW(
+      phi::errors::Unimplemented("CINN todo: new hardware HygonDCUArchHIP"));
+}
+
 void Compiler::CompileX86Module(const Module& module, bool add_module) {
   engine_->Link<CodeGenX86>(module, add_module);
 }
 
@@ -127,6 +127,10 @@ class Compiler final {
                          const std::string& code = "",
                          bool add_module = true);
 
+  void CompileHipModule(const ir::Module& module,
+                        const std::string& code = "",
+                        bool add_module = true);
+
   void CompileX86Module(const ir::Module& module, bool add_module = true);
 
   explicit Compiler(const Target& target)
 
@@ -48,6 +48,7 @@ static const char* backend_C = "C";
 static const char* backend_llvm_host = "llvm_host";
 static const char* backend_llvm_x86 = "llvm_x86";
 static const char* backend_nvgpu = "nvgpu";
+static const char* backend_hygondcu_hip = "hygonDCU_hip";
 
 /**
  * \brief Base class of the emitter of all the extern functions able to trigger
 
@@ -97,7 +97,10 @@ static const char* TargetToBackendRepr(Target target) {
       [&](common::UnknownArch) -> const char* { CINN_NOT_IMPLEMENTED; },
       [&](common::X86Arch) -> const char* { return backend_llvm_host; },
       [&](common::ARMArch) -> const char* { CINN_NOT_IMPLEMENTED; },
-      [&](common::NVGPUArch) -> const char* { return backend_nvgpu; });
+      [&](common::NVGPUArch) -> const char* { return backend_nvgpu; },
+      [&](common::HygonDCUArchHIP) -> const char* {
+        return backend_hygondcu_hip;
+      });
 }
 
 /**
 
@@ -1415,6 +1415,10 @@ int GetNaiveVecAlignmentImpl(common::NVGPUArch, const Target &target) {
   return 128;
 }
 
+int GetNaiveVecAlignmentImpl(common::HygonDCUArchHIP, const Target &target) {
+  return 128;
+}
+
 int GetNaiveVecAlignment(const Target &target) {
   return std::visit(
       [&](const auto &impl) { return GetNaiveVecAlignmentImpl(impl, target); },
 
@@ -30,10 +30,13 @@ struct ARMArch {};
 
 struct NVGPUArch {};
 
+struct HygonDCUArchHIP {};
+
 /**
  * The architecture used by the target. Determines the instruction set to use.
  */
-using ArchBase = std::variant<UnknownArch, X86Arch, ARMArch, NVGPUArch>;
+using ArchBase =
+    std::variant<UnknownArch, X86Arch, ARMArch, NVGPUArch, HygonDCUArchHIP>;
 struct Arch final : public ArchBase {
   using ArchBase::ArchBase;
 
 
@@ -27,6 +27,8 @@ std::string GetArchNameImpl(ARMArch arch) { return "ARM"; }
 
 std::string GetArchNameImpl(NVGPUArch arch) { return "NVGPU"; }
 
+std::string GetArchNameImpl(HygonDCUArchHIP arch) { return "HygonDCU_HIP"; }
+
 std::string GetArchName(Arch arch) {
   return std::visit([](const auto& impl) { return GetArchNameImpl(impl); },
                     arch.variant());