5,

phi::errors::InvalidArgument(

"The size of input X's dimensions should be less than 6."

x_dims.size()));

bool is_nchw = data_layout_str == "NCHW";

std::tie(info_d_dropout1, info_dw2, a_1, b_1, a_2, b_2) = fc_info;

if (l3_total_size >= dim_feedforward * bsz_seq * sizeof(T) &&

info_dw2.trans_x) {

r = xpu::transpose<XPUTypeT>(xpu_ctx,

true,

phi::errors::InvalidArgument(

"The 'data_layout' attribute must be NCHW or NHWC. "

data_layout));

const auto data_layout_val = common::StringToDataLayout(data_layout);

x_dims.size() >= 2 && x_dims.size() <= 5,

true,

phi::errors::InvalidArgument(

"But received: the size of input's dimensions is [%d]",

x_dims.size()));

const auto *global_mean = mean.get_ptr();

const auto *global_var = variance.get_ptr();

int r = 0;

if (is_inplace) {

float *global_inv_std_data = nullptr;

true,

phi::errors::InvalidArgument(

"The 'data_layout' attribute must be NCHW or NHWC. "

data_layout_str));

const auto& x_dims = x.dims();

5,

phi::errors::InvalidArgument(

"The size of input X's dimensions should be less than 6."

x_dims.size()));

bool is_nchw = data_layout_str == "NCHW";

const DenseTensor& y,

DenseTensor* out) {

// XPU api do not support bitwise operation now.

// we can implement bitwise_and_bool kernel by calling their logical

// counterpart. Need to be changed when adding support to other types.

LogicalAndKernel<T, Context>(ctx, x, y, out);

ids = CopyIdsToVector<int, int64_t>(ids_cpu);

} else {

PADDLE_THROW(phi::errors::Unimplemented(

}

auto ids_num = static_cast<int64_t>(input.numel());

XPUTypeT *d_dropout_grad_ptr = NULL; // dx5 [batch_size, seq_len, hidden]

XPUTypeT *d_fmha_out_ptr =

// head_dims]

XPUTypeT *d_qk_ptr =

XPUTypeT *d_combination_qkv_ptr =

NULL; // d_combination_qkv_ptr[3, batch_size, num_heads, seq_len,

// head_dims]

NULL; // dx2 [batch_size, seq_len, 3, num_heads, head_dims]

XPUTypeT *d_last_layernorm_grad_ptr =

num_heads * head_dims);

d_combination_qkv_ptr =

RAII_GUARD.alloc<XPUTypeT>(batch_size * seq_len * embed_dims * 3);

batch_size * seq_len * embed_dims * 3);

RAII_GUARD.alloc_l3_or_gm<XPUTypeT>(batch_size * seq_len * embed_dims);

d_qk_ptr = RAII_GUARD.alloc_l3_or_gm<XPUTypeT>(batch_size * seq_len *

seq_len * num_heads);

XPUTypeT *d_v_out_ptr = d_k_out_ptr + qkv_size;

r = xpu::transpose<XPUTypeT>(xpu_ctx,

d_fmha_out_ptr,

{batch_size, seq_len, num_heads, head_dims},

{0, 2, 1, 3});

PADDLE_ENFORCE_XDNN_SUCCESS(r, "transpose");

false,

attn_dropout_out_ptr,

v_out_ptr,

std::tie(info_d_qk, info_d_v, a_1, b_1, a_2, b_2) = fc_info;

phi::MatMulXPUFunction<XPUTypeT>(

//

r = xpu::transpose<XPUTypeT>(xpu_ctx,

d_combination_qkv_ptr,

{3, batch_size, num_heads, seq_len, head_dims},

{1, 3, 0, 2, 4});

PADDLE_ENFORCE_XDNN_SUCCESS(r, "transpose");

true,

use_calc_input_x_ptr,

qkv_weight_ptr,

std::tie(info_d_x, info_d_qkv_w, a_1, b_1, a_2, b_2) = fc_info;

phi::MatMulXPUFunction<XPUTypeT>(

// d_qkv_bias

r = xpu::reduce_sum(xpu_ctx,

d_qkv_bias_ptr,

{batch_size * seq_len, 3 * embed_dims},

{0});

int l3_total_size = xpu_ctx->_l3_mgr.get_size();

NULL; // x2[batch_size, seq_len, 3, num_heads,head_dims]

XPUTypeT *qk_ptr = NULL; // qk [batch_size, num_heads, seq_len, seq_len]

XPUTypeT *qkv_ptr = NULL; // qkv[batch_size, num_heads, seq_len, head_dims]

std::sort(temp_vec.begin(), temp_vec.end(), std::greater<int>());

XPUTypeT *max_gm_ptr = RAII_GUARD.alloc<XPUTypeT>(temp_vec[0]);

PADDLE_ENFORCE_XDNN_NOT_NULL(max_gm_ptr);

qk_ptr = max_gm_ptr;

qkv_ptr = max_gm_ptr;

linear_out_ptr = max_gm_ptr;

int sizeof_t = sizeof(XPUTypeT);

for (size_t i = 0; i < temp_vec.size(); ++i) {

if (l3_total_size >= temp_vec[i] * sizeof_t) {

XPUTypeT *l3_ptr = RAII_GUARD.alloc_l3<XPUTypeT>(temp_vec[i]);

(temp_size_1 <= temp_vec[i]) ? l3_ptr : max_gm_ptr;

qk_ptr = (temp_size_2 <= temp_vec[i]) ? l3_ptr : max_gm_ptr;

qkv_ptr = (temp_size_3 <= temp_vec[i]) ? l3_ptr : max_gm_ptr;

phi::MatMulXPUFunction<XPUTypeT>(xpu_ctx,

x_cacl_ptr,

qkv_weight_ptr,

qkv_fc_info,

1.0f);

// bias

r = xpu::broadcast_add(xpu_ctx,

qkv_bias_ptr,

{batch_size * seq_len, 3 * num_heads * head_dims},

{3 * num_heads * head_dims});

PADDLE_ENFORCE_XDNN_SUCCESS(r, "broadcast_add");

// transpose

r = xpu::transpose(xpu_ctx,

qkv_transpose_out_ptr,

{batch_size, seq_len, 3, num_heads, head_dims},

{2, 0, 3, 1, 4});