What's New:

Intel MLSL 2018 Update 3:

• Bug fixes.

What's New:

Intel MLSL 2018 Update 2:

• Added support for collective operations execution using communication threads (in addition to the previous approach with processes).
  This functionality is built on top of asynchronous progress threads from Intel(R) MPI Library 2019 and simplifies job launching and memory management (no need for explicit MLSL::Alloc/Free calls for communication buffers).
• Bug fixes.

What's New:

Intel MLSL 2018 Update 1:

• Intel(R) MPI Library Runtime updated to version 2018 Update 3
• Added support for AllGatherv collective
• Switched to Apache License, Version 2.0
• Bug fixes

What's New:

Intel MLSL 2018:

• Message prioritization (experimental feature)
• Intel(R) MPI Library runtime updated to version 2018 Update 2
• Bug fixes and performance improvements

What's New:

Intel MLSL 2017 Update 2:

• Support for fine-grained tuning of internal launch mechanism (see MLSL_SERVER_CREATION_TYPE, MLSL_HOSTNAME_TYPE, MLSL_HOSTNAME)
• Improved stability
• Support for parameter quantization (see a sample file in the package for reference)
• Intel(R) MPI Library runtime updated to version 2018 Update 1

What's New:

Intel MLSL 2017 Update 1:

• Added Python bindings
• Bug fixes

This release of the Intel(R) Machine Learning Scaling Library supports the
following major features:

• Data, model, and hybrid parallelism
• Synchronous Stochastic Gradient Descent (SGD) and its variants (AdaGrad, Momentum, etc.)
  support by communication patterns
• Distributed weight update
• Advanced communication statistics
• C/C++ interfaces
• Support for Intel(R) Xeon(R) and Intel(R) Xeon Phi(TM) processors
  (formerly code named Knights Landing)
• Support for the following network interconnects:
  o Intel(R) Omni-Path Architecture (Intel(R) OPA)
  o Infiniband*
  o Ethernet*
• API is changed since Intel MLSL 2017 Beta release

This release of the Intel(R) Machine Learning Scaling Library supports the
following major features:

• Data, model, and hybrid parallelism
• Synchronous Stochastic Gradient Descent (SGD) and its variants (AdaGrad, Momentum, etc.)
  support by communication patterns
• Distributed weight update
• Support for Intel(R) Xeon(R) and Intel(R) Xeon Phi(TM) processors
  (formerly code named Knights Landing)
• Support for the following network interconnects:
  o Intel(R) Omni-Path Architecture (Intel(R) OPA)
  o Infiniband*
  o Ethernet*