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A concurrency framework for building real-time systems.
Features
Tasks as the unit of concurrency 1. Tasks can be event triggered
(fired in response to asynchronous stimuli) or spawned by the application on
demand.
Message passing between tasks. Specifically, messages can be passed to
software tasks at spawn time.
A timer queue2. Software tasks can be delayed or scheduled to continue running
at some time in the future. This feature can be used to implement periodic tasks.
Support for prioritization of tasks and, thus, preemptive multitasking.
Efficient and data race free memory sharing through fine-grained priority
based critical sections 1.
Deadlock free execution guaranteed at compile time. This is a stronger
guarantee than what's provided by the standard Mutex
abstraction.
Minimal scheduling overhead. The task scheduler has minimal software
footprint; the hardware does the bulk of the scheduling.
Highly efficient memory usage: All the tasks share a single call stack and
there's no hard dependency on a dynamic memory allocator.
All Cortex-M devices are fully supported.
Most RISC-V devices are supported. Refer to the RTIC book
to learn more about RISC-V backends, their particularities, and their limitations.
This task model is amenable to known WCET (Worst Case Execution Time) analysis
and scheduling analysis techniques.
Unless you explicitly state otherwise, any contribution intentionally submitted
for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
licensed as above, without any additional terms or conditions.
Footnotes
Eriksson, J., Häggström, F., Aittamaa, S., Kruglyak, A., & Lindgren, P.
(2013, June). Real-time for the masses, step 1: Programming API and static
priority SRP kernel primitives. In Industrial Embedded Systems (SIES), 2013
8th IEEE International Symposium on (pp. 110-113). IEEE. ↩↩2
Lindgren, P., Fresk, E., Lindner, M., Lindner, A., Pereira, D., & Pinho,
L. M. (2016). Abstract timers and their implementation onto the arm cortex-m
family of mcus. ACM SIGBED Review, 13(1), 48-53. ↩
About
Real-Time Interrupt-driven Concurrency (RTIC) framework for ARM Cortex-M microcontrollers